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2020 – today
- 2025
[j7]Junfei Deng, Huolian Liu, Chenxi Han
, Li Dang, Hongzhi Liang, Shubin Liu:
A design of 96 GS/s 7-bit DAC for high-speed wireline transmitter in 28-nm CMOS. Microelectron. J. 166: 106863 (2025)- [j6]Jie Liu, Xianting Su, Zekai Yang, Zhicheng Dong, Chenxi Han, Xiaoteng Zhao, Shubin Liu:
A 7-bit 8 GHz phase interpolator with eight-phase output using a linear weighting scheme using only 50 % interpolation units. Microelectron. J. 166: 106874 (2025) - [c3]Chenxi Han, Xiaoteng Zhao, Qi Zhang, Yuan Liu, Yuhao Zhang, Hongzhi Liang, Yukui Yu, Shubin Liu, Zhangming Zhu:
A 100Gb/s Transmitter with Digital Pre-Distortion and MUX-Merged Voltage-Mode Driver Achieving 3-Times INLPP Improvement in 28nm CMOS. CICC 2025: 1-3 - [c2]Xiaoteng Zhao, Yuhao Zhang, Hao Chang, Yilong Dong, Chenxi Han, Zekai Yang, Zhicheng Dong, Rong Zhou, Shubin Liu, Zhangming Zhu:
A Reference-Less CDR Using SAR-Based Frequency-Acquisition Technique Achieving 55ns Constant Band-Searching Time and up to 63.64Gb/s/µs Acquisition Speed. ISSCC 2025: 150-152 - 2024
- [j5]Shubin Liu, Chenxi Han, Xiaoteng Zhao, Yuhao Zhang, Shixin Li, Hongzhi Liang, Lihong Yang, Zhangming Zhu:
A 56 Gb/s DAC-DSP-based transmitter with adaptive retiming clock optimization using inverse-PR-based PD achieving 8-UI converge time in 28-nm CMOS. Sci. China Inf. Sci. 67(8) (2024) - [c1]Yi Cheng, Chenxi Han, Yuheng Min, Houde Liu, Linqi Ye, Hang Liu:
Structural Optimization of Lightweight Bipedal Robot via SERL. IROS 2024: 9066-9073 - [i1]Yi Cheng, Chenxi Han, Yuheng Min, Linqi Ye, Houde Liu, Hang Liu:
Structural Optimization of Lightweight Bipedal Robot via SERL. CoRR abs/2408.15632 (2024) - 2023
- [j4]Yuhao Zhang, Chenxi Han, Shubin Liu:
A digital calibration technique for N-channel time-interleaved ADC based on simulated annealing algorithm. Microelectron. J. 133: 105701 (2023) - [j3]Yi Shen, Jian Liu, Chenxi Han, Angyang Li, Shubin Liu, Ruixue Ding, Zhangming Zhu:
An Energy-Efficient SAR ADC With a Coarse-Fine Bypass Window Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 166-175 (2023) - [j2]Chenxi Han, Shubin Liu, Yuhao Zhang, Lichen Feng, Hongzhi Liang, Zhangming Zhu:
An All-Digital Background Calibration Technique for M-Channel Downsampling Time-Interleaved ADCs Based on Interpolation. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 1896-1900 (2023) - 2022
- [j1]Lichen Feng, Liying Yang, Shubin Liu, Chenxi Han, Yueqi Zhang, Zhangming Zhu:
An efficient EEGNet processor design for portable EEG-Based BCIs. Microelectron. J. 120: 105356 (2022)
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