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Chung Y. Joseph Yip

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1990 – 1999

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1996
[j1]
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Jashojiban Banik, Keng L. Wong, George L. Geannopoulos, Chung Y. Joseph Yip:
A high performance 0.35-μm 3.3-V BiCMOS technology optimized for product porting from a 0.6-μm 3.3-V BiCMOS technology. IEEE J. Solid State Circuits 31(10): 1437-1442 (1996)

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