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Alejandro Rico

Alejandro Rico Carro

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Books and Theses

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2013
[b1]
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Alejandro Rico Carro:
Raising the level of abstraction: simulation of large chip multiprocessors running multithreaded applications. Polytechnic University of Catalonia, Spain, 2013

Journal Articles

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2019
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Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Mateo Valero:
On the maturity of parallel applications for asymmetric multi-core processors. J. Parallel Distributed Comput. 127: 105-115 (2019)
[j7]
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Thomas Grass, Trevor E. Carlson, Alejandro Rico, Germán Ceballos, Eduard Ayguadé, Marc Casas, Miquel Moretó:
Sampled Simulation of Task-Based Programs. IEEE Trans. Computers 68(2): 255-269 (2019)
2017
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Victor Garcia, Alejandro Rico, Carlos Villavieja, Paul M. Carpenter, Nacho Navarro, Alex Ramírez:
Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors. Int. J. Parallel Program. 45(3): 530-550 (2017)
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Nigel Stephens, Stuart Biles, Matthias Boettcher, Jacob Eapen, Mbou Eyole, Giacomo Gabrielli, Matt Horsnell, Grigorios Magklis, Alejandro Martinez, Nathanaël Prémillieu, Alastair Reid, Alejandro Rico, Paul Walker:
The ARM Scalable Vector Extension. IEEE Micro 37(2): 26-39 (2017)
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Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moretó, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero:
Task Scheduling Techniques for Asymmetric Multi-Core Systems. IEEE Trans. Parallel Distributed Syst. 28(7): 2074-2087 (2017)
2014
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Nikola Rajovic, Alejandro Rico, Nikola Puzovic, Chris Adeniyi-Jones, Alex Ramírez:
Tibidabo: Making the case for an ARM-based HPC system. Future Gener. Comput. Syst. 36: 322-334 (2014)
2012
[j2]
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Alejandro Rico, Felipe Cabarcas, Carlos Villavieja, Milan Pavlovic, Augusto Vega, Yoav Etsion, Alex Ramírez, Mateo Valero:
On the simulation of large-scale architectures using multiple application abstraction levels. ACM Trans. Archit. Code Optim. 8(4): 36:1-36:20 (2012)
2009
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Alejandro Rico, Alex Ramírez, Mateo Valero:
Available task-level parallelism on the Cell BE. Sci. Program. 17(1-2): 59-76 (2009)

Conference and Workshop Papers

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2023
[c26]
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Víctor Soria Pardos, Adrià Armejach, Tiago Mück, Darío Suárez Gracia, José A. Joao, Alejandro Rico, Miquel Moretó:
DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations. ISCA 2023: 30:1-30:13
2022
[c25]
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Supreet Jeloka, Brian Cline, Shidhartha Das, Benoit Labbe, Alejandro Rico, Rainer Herberholz, Javier A. DeLaCruz, Rahul Mathur, Shawn Hung:
System technology co-optimization and design challenges for 3D IC. CICC 2022: 1-6
2021
[c24]
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Lingjun Zhu, Tuan Ta, Rossana Liu, Rahul Mathur, Xiaoqing Xu, Shidhartha Das, Ankit Kaul, Alejandro Rico, Doug Joseph, Brian Cline, Sung Kyu Lim:
Power Delivery and Thermal-Aware Arm-Based Multi-Tier 3D Architecture. ISLPED 2021: 1-6
2020
[c23]
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Kevin Sala, Alejandro Rico, Vicenç Beltran:
Towards Data-Flow Parallelization for Adaptive Mesh Refinement Applications. CLUSTER 2020: 314-325
2019
[c22]
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Alejandro Rico:
Scaling up performance of fat nodes for HPC. CF 2019: 318
[c21]
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Alejandro Rico, Isaac Sánchez Barrera, José A. Joao, Joshua Randall, Marc Casas, Miquel Moretó:
On the Benefits of Tasking with OpenMP. IWOMP 2019: 217-230
[c20]
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Joshua Randall, Alejandro Rico, José A. Joao:
Cache Line Sharing and Communication in ECP Proxy Applications. IWOMP 2019: 306-319
[c19]
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Ziqiang Huang, José A. Joao, Alejandro Rico, Andrew D. Hilton, Benjamin C. Lee:
DynaSprint: Microarchitectural Sprints with Dynamic Utility and Thermal Management. MICRO 2019: 426-439
2017
[c18]
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Alejandro Rico, José A. Joao, Chris Adeniyi-Jones, Eric Van Hensbergen:
ARM HPC Ecosystem and the Reemergence of Vectors: Invited Paper. Conf. Computing Frontiers 2017: 329-334
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Ugljesa Milic, Alejandro Rico, Paul M. Carpenter, Alex Ramírez:
Sharing the instruction cache among lean cores on an asymmetric CMP for HPC applications. ISPASS 2017: 3-12
2016
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Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero:
POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware. PACT 2016: 415-417
[c15]
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Ugljesa Milic, Paul M. Carpenter, Alejandro Rico, Alex Ramírez:
Rebalancing the core front-end through HPC code analysis. IISWC 2016: 128-137
[c14]
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Victor Garcia, Juan Gómez-Luna, Thomas Grass, Alejandro Rico, Eduard Ayguadé, Antonio J. Peña:
Evaluating the effect of last-level cache sharing on integrated GPU-CPU systems with heterogeneous applications. IISWC 2016: 168-177
[c13]
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Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Eduard Ayguadé:
TaskPoint: Sampled simulation of task-based programs. ISPASS 2016: 296-306
[c12]
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Nikola Rajovic, Alejandro Rico, Filippo Mantovani, Daniel Ruiz, Josep Oriol Vilarrubi, Constantino Gómez, Luna Backes, Diego Nieto, Harald Servat, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Chris Adeniyi-Jones, Said Derradji, Hervé Gloaguen, Piero Lanucara, Nico Sanna, Jean-François Méhaut, Kevin Pouget, Brice Videau, Eric Boyer, Momme Allalen, Axel Auweter, David Brayford, Daniele Tafani, Volker Weinberg, Dirk Brömmel, René Halver, Jan H. Meinke, Ramón Beivide, Mariano Benito, Enrique Vallejo, Mateo Valero, Alex Ramírez:
The mont-blanc prototype: an alternative approach for HPC systems. SC 2016: 444-455
[c11]
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Thomas Grass, César Allande, Adrià Armejach, Alejandro Rico, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas, Miquel Moretó:
MUSA: a multi-level simulation approach for next-generation HPC machines. SC 2016: 526-537
2015
[c10]
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Kallia Chronaki, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero:
Criticality-Aware Dynamic Task Scheduling for Heterogeneous Architectures. ICS 2015: 329-338
[c9]
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Luna Backes, Alejandro Rico, Björn Franke:
Experiences in speeding up computer vision applications on mobile computing platforms. SAMOS 2015: 1-8
2014
[c8]
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Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Alex Ramírez:
Evaluating Execution Time Predictability of Task-Based Programs on Multi-Core Processors. Euro-Par Workshops (2) 2014: 218-229
2013
[c7]
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Nikola Rajovic, Alejandro Rico, James Vipond, Isaac Gelado, Nikola Puzovic, Alex Ramírez:
Experiences with mobile processors for energy efficient HPC. DATE 2013: 464-468
[c6]
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Alejandro Rico, Alex Ramírez, Mateo Valero:
Trace filtering of multithreaded applications for CMP memory simulation. ISPASS 2013: 134-135
2011
[c5]
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Alejandro Rico, Alejandro Duran, Felipe Cabarcas, Yoav Etsion, Alex Ramírez, Mateo Valero:
Trace-driven simulation of multithreaded applications. ISPASS 2011: 87-96
2010
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Alejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose:
Performance and power evaluation of an in-line accelerator. Conf. Computing Frontiers 2010: 81-82
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Augusto Vega, Alejandro Rico, Felipe Cabarcas, Alex Ramírez, Mateo Valero:
Comparing last-level cache designs for CMP architectures. IFMT 2010: 2:1-2:11
[c2]
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Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex Ramírez, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero:
Task Superscalar: An Out-of-Order Task Pipeline. MICRO 2010: 89-100
[c1]
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Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex Ramírez:
Interleaving granularity on high bandwidth memory architecture for CMPs. ICSAMOS 2010: 250-257

Informal and Other Publications

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2018
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Nigel Stephens, Stuart Biles, Matthias Boettcher, Jacob Eapen, Mbou Eyole, Giacomo Gabrielli, Matt Horsnell, Grigorios Magklis, Alejandro Martinez, Nathanaël Prémillieu, Alastair Reid, Alejandro Rico, Paul Walker:
The ARM Scalable Vector Extension. CoRR abs/1803.06185 (2018)

Coauthor Index

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