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K. N. Muralidhara

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2010 – 2019

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2012
[c1]
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  - conf/acity/RangarajuSM12
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H. G. Rangaraju, Aakash Babu Suresh, K. N. Muralidhara:
Design of Efficient Reversible Multiplier. ACITY (3) 2012: 571-579
2010
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H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, K. B. Raja:
Low Power Reversible Parallel Binary Adder/Subtractor. CoRR abs/1009.6218 (2010)

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