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2020 – today
- 2024
[j8]Amr Walid
, Dadian Zhou, Jose Silva-Martinez:
Matrix-Based Digital Calibration Technique for High-Performance SAR and Pipeline ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 71(1): 20-28 (2024)- 2021
- [j7]José Silva-Martínez, Xiaosen Liu, Dadian Zhou:
Recent Advances on Linear Low-Dropout Regulators. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 568-573 (2021) - 2020
- [j6]Dadian Zhou, Junning Jiang, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 245-mA Digitally Assisted Dual-Loop Low-Dropout Regulator. IEEE J. Solid State Circuits 55(8): 2140-2150 (2020) - [j5]Chulhyun Park, Tao Chen, Kyoohyun Noh, Dadian Zhou, Suraj Prakash, Mohammadhossein Naderi Alizadeh, Aydin I. Karsilayan, Degang Chen, Randall L. Geiger, José Silva-Martínez:
A 12-Bit 125-MS/s 2.5-Bit/Cycle SAR-Based Pipeline ADC Employing a Self-Biased Gain Boosting Amplifier. IEEE Trans. Circuits Syst. 67-I(11): 3618-3629 (2020) - [j4]Tao Chen, Chulhyun Park, Hao Meng, Dadian Zhou, José Silva-Martínez, Randall L. Geiger, Degang Chen:
A Low-Cost On-Chip Built-In Self-Test Solution for ADC Linearity Test. IEEE Trans. Instrum. Meas. 69(6): 3516-3526 (2020)
2010 – 2019
- 2019
- [j3]Dadian Zhou, Carlos Briseno-Vidrios, Junning Jiang, Chulhyun Park, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3373-3383 (2019) - 2018
- [j2]Carlos Briseno-Vidrios, Dadian Zhou, Suraj Prakash, Qiyuan Liu, Alexander Edward, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs. IEEE J. Solid State Circuits 53(11): 3280-3292 (2018) - [j1]Qiyuan Liu, Alexander Edward, Dadian Zhou, José Silva-Martínez:
A Continuous-Time MASH 1-1-1 Delta-Sigma Modulator With FIR DAC and Encoder-Embedded Loop-Unrolling Quantizer in 40-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 26(4): 756-767 (2018) - 2017
- [c4]Carlos Briseno-Vidrios, Dadian Zhou, Suraj Prakash, Qiyuan Liu, Alexander Edward, José Silva-Martínez:
A 13bit 200MS/S pipeline ADC with current-mode MDACs. ISCAS 2017: 1-4 - [c3]Aditya Bommireddipalli, Dadian Zhou, Claudio Talarico, José Silva-Martínez, Aydin I. Karsilayan:
A 200MSPS time-interleaved 12-bit ADC system with digital calibration. MWSCAS 2017: 1184-1187 - 2016
- [c2]Dadian Zhou, Claudio Talarico, José Silva-Martínez:
A digital-circuit-based evolutionary-computation algorithm for time-interleaved ADC background calibration. SoCC 2016: 13-17 - 2012
- [c1]Dadian Zhou, Yuhui Shi, Shi Cheng:
Brain Storm Optimization Algorithm with Modified Step-Size and Individual Generation. ICSI (1) 2012: 243-252
Coauthor Index
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