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Jae-Wook Lee 0007
Person information
- affiliation: Samsung Electronics, Hwaseong, South Korea
- affiliation (PhD 2005): Yonsei University, Department of Electhical Engiiie~ring, Seoul, South Korea
Other persons with the same name
- Jaewook Lee (aka: Jae-Wook Lee) — disambiguation page
- Jaewook Lee 0001
— Seoul National University, Department of Industrial Engineering, South Korea (and 2 more)
- Jaewook Lee 0002
— Korea University, School of Electrical Engineering, Seoul, South Korea
- Jaewook Lee 0003
— Shizuoka University, Research Institute of Green Science and Technology, Japan
- Jaewook Lee 0004
— Gwangju Institute of Science and Technology (GIST), School of Mechanical Engineering, South Korea (and 1 more)
- Jaewook Lee 0005
— University of Washington, Seattle, Washington, USA
- Jaewook Lee 0006 — University of Massachusetts Amherst, MA, USA
- Jaewook Lee 0008 — Korea University, Seoul, South Korea
- Jaewook Lee 0009 — Korea Advanced Institute of Science and Technology (KAIST), Graduate School of AI, Seoul, South Korea
- Jaewook Lee 0010 — Electronics and Telecommunications Research Institute (ETRI), Daejeon, South Korea (and 1 more)
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2020 – today
- 2020
- [c6]Chi-Sung Oh, Ki Chul Chun, Young-Yong Byun, Yong-Ki Kim, So-Young Kim, Yesin Ryu, Jaewon Park, Sinho Kim, Sang-uhn Cha, Dong-Hak Shin, Jungyu Lee, Jong-Pil Son, Byung-Kyu Ho, Seong-Jin Cho, Beomyong Kil, Sungoh Ahn, Baekmin Lim, Yong-Sik Park, Kijun Lee, Myung-Kyu Lee, Seungduk Baek, Junyong Noh, Jae-Wook Lee, Seungseob Lee, Sooyoung Kim, Bo-Tak Lim, Seouk-Kyu Choi, Jin-Guk Kim, Hye-In Choi, Hyuk-Jun Kwon, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Kwang-Il Park, Jung-Bae Lee:
22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme. ISSCC 2020: 330-332
2010 – 2019
- 2016
- [c5]Kyomin Sohn, Won-Joo Yun, Reum Oh, Chi-Sung Oh, Seong-Young Seo, Min-Sang Park, Dong-Hak Shin, Won-Chang Jung, Sang-Hoon Shin, Je-Min Ryu, Hye-Seung Yu, Jae-Hun Jung, Kyung-Woo Nam, Seouk-Kyu Choi, Jae-Wook Lee, Uksong Kang, Young-Soo Sohn, Jung-Hwan Choi, Chi-Wook Kim, Seong-Jin Jang, Gyo-Young Jin:
18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution. ISSCC 2016: 316-317 - 2012
- [c4]Youngdon Choi, Ickhyun Song
, Mu-Hui Park, Hoeju Chung
, Sanghoan Chang, Beakhyoung Cho, Jinyoung Kim, Younghoon Oh, Dukmin Kwon, Jung Sunwoo, Junho Shin, Yoohwan Rho, Changsoo Lee, Min Gu Kang, Jaeyun Lee, Yongjin Kwon, Soehee Kim, Jaewhan Kim, Yong-jun Lee, Qi Wang, Sooho Cha, Sujin Ahn, Hideki Horii, Jaewook Lee, KiSeung Kim, Han-Sung Joo, KwangJin Lee, Yeong-Taek Lee, Jei-Hwan Yoo, Gitae Jeong:
A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth. ISSCC 2012: 46-48 - 2011
- [c3]Hoeju Chung
, Byung-Hoon Jeong, ByungJun Min, Youngdon Choi, Beak-Hyung Cho, Junho Shin, Jinyoung Kim, Jung Sunwoo, Joon-min Park, Qi Wang, Yong-jun Lee, Sooho Cha, Dukmin Kwon, Sang-Tae Kim, Sunghoon Kim
, Yoohwan Rho, Mu-Hui Park, Jaewhan Kim, Ickhyun Song
, Sunghyun Jun, Jaewook Lee, KiSeung Kim, Ki-won Lim, Won-ryul Chung, ChangHan Choi, HoGeun Cho, Inchul Shin, Woochul Jun, Seokwon Hwang, Ki-Whan Song, KwangJin Lee, Sang-whan Chang, Woo-Yeong Cho, Jei-Hwan Yoo, Young-Hyun Jun:
A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW. ISSCC 2011: 500-502 - 2010
- [j2]Uksong Kang, Hoeju Chung, Seongmoo Heo, Dukha Park, Hoon Lee, Jin Ho Kim, Soon-Hong Ahn, Sooho Cha, Jaesung Ahn, Dukmin Kwon, Jae-Wook Lee, Han-Sung Joo, Woo-Seop Kim, Dong Hyeon Jang, Nam-Seog Kim, Jung-Hwan Choi, Tae-Gyeong Chung, Jei-Hwan Yoo, Joo-Sun Choi, Changhyun Kim, Young-Hyun Jun:
8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology. IEEE J. Solid State Circuits 45(1): 111-119 (2010)
2000 – 2009
- 2009
- [c2]Uksong Kang, Hoeju Chung, Seongmoo Heo, Soon-Hong Ahn, Hoon Lee, Sooho Cha, Jaesung Ahn, Dukmin Kwon, Jin Ho Kim, Jae-Wook Lee, Han-Sung Joo, Woo-Seop Kim, Hyun-Kyung Kim, Eun-Mi Lee, So-Ra Kim, Keum-Hee Ma, Dong-Hyun Jang, Nam-Seog Kim, Man-Sik Choi, Sae-Jang Oh, Jung-Bae Lee, Tae-Kyung Jung, Jei-Hwan Yoo, Changhyun Kim:
8Gb 3D DDR3 DRAM using through-silicon-via technology. ISSCC 2009: 130-131 - 2006
- [j1]Ki-Hyuk Lee, Jae-Wook Lee, Woo-Young Choi:
A 0.18 µm CMOS 3.125-Gb/s Digitally Controlled Adaptive Line Equalizer with Feed-Forward Swing Control for Backplane Serial Link. IEICE Trans. Electron. 89-C(10): 1454-1459 (2006)
1990 – 1999
- 1996
- [c1]Jae-Wook Lee, Sungho Kang:
Efficient Simulation Model Generation Using Automatic Programming Techniques. WSC 1996: 708-713
Coauthor Index

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