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Yiqing Huang 0002
Person information
- affiliation: Waseda University, Kitakyushu, Japan
Other persons with the same name
- Yiqing Huang (aka: YiQing Huang) — disambiguation page
- Yiqing Huang 0001 (aka: YiQing Huang 0001) — Anhui Polytechnic University, School of Electrical Engineering, Wuhu, China
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2010 – 2019
- 2012
- [j14]Lei Sun, Jie Leng, Jia Su, Yiqing Huang, Hiroomi Motohashi, Takeshi Ikenaga:
Low-Complexity Coarse-Level Mode-Mapping Based H.264/AVC to H.264/SVC Spatial Transcoding for Video Conferencing. IEICE Trans. Inf. Syst. 95-D(5): 1313-1323 (2012) - 2011
- [j13]Yiqing Huang, Xiaocong Jin, Jin Zhou, Jia Su, Takeshi Ikenaga:
Highly Parallel and Fully Reused H.264/AVC High Profile Intra Predictor Generation Engine for Super Hi-Vision 4k×4k@60 fps. IEICE Trans. Electron. 94-C(4): 428-438 (2011) - [j12]Xiaocong Jin, Jun Sun, Yiqing Huang, Jia Su, Takeshi Ikenaga:
Fast H.264/AVC DIRECT Mode Decision Based on Mode Selection and Predicted Rate-Distortion Cost. IEICE Trans. Inf. Syst. 94-D(8): 1653-1662 (2011) - [j11]Jia Su, Yiqing Huang, Lei Sun, Shinichi Sakaida, Takeshi Ikenaga:
Content Based Coarse to Fine Adaptive Interpolation Filter for High Resolution Video Coding. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(10): 2013-2021 (2011) - [c19]Xiaocong Jin, Jun Sun, Jun Zhou, Yiqing Huang, Jia Su, Takeshi Ikenaga:
Adaptive fast DIRECT mode decision algorithm using mode and Lagrangian cost prediction for B frame in H.264/AVC. ICME 2011: 1-6 - [c18]Jia Su, Yiqing Huang, Lei Sun, Shinichi Sakaida, Takeshi Ikenaga:
Coarse to fine adaptive interpolation filter for high resolution video coding. ICME 2011: 1-6 - 2010
- [j10]Yiqing Huang, Takeshi Ikenaga:
Highly Parallel Fractional Motion Estimation Engine for Super Hi-Vision 4k×4k@60 fps. IEICE Trans. Electron. 93-C(3): 244-252 (2010) - [j9]Shuijiong Wu, Peilin Liu, Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Constant Bit-Rate Multi-Stage Rate Control for Rate-Distortion Optimized H.264/AVC Encoders. IEICE Trans. Inf. Syst. 93-D(7): 1716-1726 (2010) - [c17]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Fully Utilized and Low Design Effort Architecture for H.264/AVC Intra Predictor Generation. MMM 2010: 737-742
2000 – 2009
- 2009
- [j8]Qin Liu, Yiqing Huang, Satoshi Goto, Takeshi Ikenaga:
Hardware-Oriented Early Detection Algorithms for 4×4 and 8×8 All-Zero Blocks in H.264. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 1063-1071 (2009) - [j7]Yiqing Huang, Qin Liu, Satoshi Goto, Takeshi Ikenaga:
VLSI Oriented Fast Motion Estimation Algorithm Based on Pixel Difference, Block Overlapping and Motion Feature Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(8): 1986-1999 (2009) - [j6]Yiqing Huang, Qin Liu, Satoshi Goto, Takeshi Ikenaga:
Adaptive Sub-Sampling Based Reconfigurable SAD Tree Architecture for HDTV Application. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(11): 2819-2829 (2009) - [j5]Yiqing Huang, Qin Liu, Shuijiong Wu, Zhewen Zheng, Takeshi Ikenaga:
Macroblock and Motion Feature Analysis to H.264/AVC Fast Inter Mode Decision. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3361-3368 (2009) - [j4]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Macroblock Feature Based Adaptive Propagate Partial SAD Architecture for HDTV Application. IPSJ Trans. Syst. LSI Des. Methodol. 2: 263-273 (2009) - [c16]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Fast inter mode decision algorithm based on macroblock and motion feature analysis for H.264/AVC video coding. EUSIPCO 2009: 1804-1808 - [c15]Shuijiong Wu, Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Rate-distortion optimized multi-stage rate control algorithm for H.264/AVC video coding. EUSIPCO 2009: 1809-1813 - [c14]Yiqing Huang, Qin Liu, Satoshi Goto, Takeshi Ikenaga:
Reconfigurable SAD tree architecture based on adaptive sub-sampling in HDTV application. ACM Great Lakes Symposium on VLSI 2009: 463-468 - [c13]Shuijiong Wu, Yiqing Huang, Takeshi Ikenaga:
A Macroblock-Level Rate Control Algorithm for H.264/AVC Video Coding with Context-Adaptive MAD Prediction Model. ICCMS 2009: 124-128 - [c12]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Spatial feature based reconfigurable H.264/AVC integer motion estimation architecture for HDTV video encoder. DPS 2009: 1-6 - [c11]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Macroblock feature and motion involved multi-stage fast inter mode decision algorithm in H.264/AVC video coding. ICIP 2009: 1041-1044 - [c10]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Content aware configurable architecture for H.264/AVC integer motion estimation engine. ICME 2009: 37-40 - [c9]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Highly parallel fractional motion estimation engine for Super Hi-Vision 4k×4k@60fps. MMSP 2009: 1-6 - [c8]Shuijiong Wu, Peilin Liu, Yiqing Huang, Qin Liu, Takeshi Ikenaga:
On bit allocation and Lagrange Multiplier adjustment for rate-distortion optimized H.264 rate control. MMSP 2009: 1-6 - [c7]Jingbang Qiu, Tianci Huang, Yiqing Huang, Takeshi Ikenaga:
A Hardware Accelerator with Variable Pixel Representation & Skip Mode Prediction for Feature Point Detection Part of SIFT Algorithm. MVA 2009: 239-242 - 2008
- [j3]Yiqing Huang, Zhenyu Liu, Yang Song, Satoshi Goto, Takeshi Ikenaga:
Parallel Improved HDTV720p Targeted Propagate Partial SAD Architecture for Variable Block Size Motion Estimation in H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(4): 987-997 (2008) - [j2]Qin Liu, Yiqing Huang, Satoshi Goto, Takeshi Ikenaga:
Edge Block Detection and Motion Vector Information Based Fast VBSME Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(8): 1935-1943 (2008) - [j1]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Macroblock Feature Based Complexity Reduction for H.264/AVC Motion Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(10): 2934-2944 (2008) - [c6]Yiqing Huang, Qin Liu, Takeshi Ikenaga:
Compressor tree based processing element optimization in propagate partial SAD architecture. APCCAS 2008: 1786-1789 - [c5]Qin Liu, Yiqing Huang, Takeshi Ikenaga:
Early detection algorithms for 4×4 and 8×8 all-zero blocks in H.264/AVC. EUSIPCO 2008: 1-5 - [c4]Yiqing Huang, Satoshi Goto, Takeshi Ikenaga:
VLSI friendly computation reduction scheme in H.264/AVC motion estimation. ISCAS 2008: 844-847 - [c3]Qin Liu, Yiqing Huang, Takeshi Ikenaga:
Early detection algorithms for 8×8 all-zero blocks in H.264/AVC. MMSP 2008: 355-358 - 2007
- [c2]Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga:
VLSI friendly edge gradient detection based multiple reference frames motion estimation optimization for H.264/AVC. EUSIPCO 2007: 1809-1813 - [c1]Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga:
Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC. ACM Great Lakes Symposium on VLSI 2007: 160-163
Coauthor Index
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