BibTeX records: Jheng-Syun Huang

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@inproceedings{DBLP:conf/biocas/ShenHL24,
  author       = {Zhe{-}Wei Shen and
                  Jheng{-}Syun Huang and
                  Yi{-}Chang Lu},
  title        = {A Memory-Efficient Accelerator for 128-Parallel Sequence-to-Graph
                  Alignment in Variant-Enriched Regions},
  booktitle    = {{IEEE} Biomedical Circuits and Systems Conference, BioCAS 2024, Xi'an,
                  China, October 24-26, 2024},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2024},
  url          = {https://doi.org/10.1109/BioCAS61083.2024.10798330},
  doi          = {10.1109/BIOCAS61083.2024.10798330},
  timestamp    = {Fri, 31 Jan 2025 10:25:54 +0100},
  biburl       = {https://dblp.org/rec/conf/biocas/ShenHL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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