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2010 – 2019
- 2010
[c1]Cheolmin Park, Roy W. Badeau, Larry L. Biro, Jonathan Chang, Tejpal Singh, Jim Vash, Bo Wang, Tom Wang:
A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® processor. ISSCC 2010: 180-181
1990 – 1999
- 1992
- [j1]Roy W. Badeau, R. Iris Bahar
, Debra Bemstein, Larry L. Biro, William J. Bowhill, John F. Brown III, Michael A. Case, Ruben W. Castelino, Elizabeth M. Cooper, Maureen A. Delaney, David R. Deverell, John H. Edmondson, John J. Ellis, Timothy C. Fischer, Thomas F. Fox, Mary K. Gowan, Paul E. Gronowski, William V. Herrick, Anil K. Jain, Jeanne E. Meyer, Daniel G. Miner, Hamid Partovi, Victor Peng, Ronald P. Preston, Chandrasekhara Somanathan, Rebecca L. Stamm, Stephen C. Thierauf, G. Michael Uhler, Nicholas D. Wade, William R. Wheeler:
A 100-MHz macropipelined VAX microprocessor. IEEE J. Solid State Circuits 27(11): 1585-1598 (1992)
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