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Win Chaivipas
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2010 – 2019
- 2014
- [c6]Takayuki Shibasaki, Win Chaivipas, Yanfei Chen, Yoshiyasu Doi, Takayuki Hamada, Hideki Takauchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura:
A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS. VLSIC 2014: 1-2 - 2013
- [j7]Yoshiyasu Doi, Takayuki Shibasaki, Takumi Danjo, Win Chaivipas, Takushi Hashida, Hiroki Miyaoka, Masanori Hoshino, Yoichi Koyanagi, Takuji Yamamoto, Sanroku Tsukamoto, Hirotaka Tamura:
A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process. IEEE J. Solid State Circuits 48(12): 3258-3267 (2013) - [c5]Yoshiyasu Doi, Takayuki Shibasaki, Takumi Danjo, Win Chaivipas, Takushi Hashida, Hiroki Miyaoka, Masanori Hoshino, Yoichi Koyanagi, Takuji Yamamoto, Sanroku Tsukamoto, Hirotaka Tamura:
32Gb/s data-interpolator receiver with 2-tap DFE in 28nm CMOS. ISSCC 2013: 36-37 - 2012
- [c4]Ryo Minami, Hiroki Asada, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Win Chaivipas, Kenichi Okada
, Akira Matsuzawa:
A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm CMOS. ASP-DAC 2012: 467-468 - 2011
- [j6]Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa:
A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer for MM-Wave Applications. IEEE J. Solid State Circuits 46(11): 2635-2649 (2011) - [j5]Kenichi Okada, Ning Li, Kota Matsushita, Keigo Bunsen
, Rui Murakami, Ahmed Musa, Takahiro Sato, Hiroki Asada, Naoki Takayama, Shogo Ito, Win Chaivipas, Ryo Minami, Tatsuya Yamaguchi, Yasuaki Takeuchi, Hiroyuki Yamagishi, Makoto Noda, Akira Matsuzawa:
A 60-GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver for IEEE802.15.3c. IEEE J. Solid State Circuits 46(12): 2988-3004 (2011) - [c3]Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa:
A 58-63.6GHz quadrature PLL frequency synthesizer using dual-injection technique. ASP-DAC 2011: 101-102 - [c2]Kenichi Okada, Kota Matsushita, Keigo Bunsen
, Rui Murakami, Ahmed Musa, Takahiro Sato, Hiroki Asada, Naoki Takayama, Ning Li, Shogo Ito, Win Chaivipas, Ryo Minami, Akira Matsuzawa:
A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE 802.15.3c. ISSCC 2011: 160-162
2000 – 2009
- 2008
- [j4]Ning Li, Win Chaivipas, Kenichi Okada, Akira Matsuzawa:
Analysis of CMOS Transconductance Amplifiers for Sampling Mixers. IEICE Trans. Electron. 91-C(6): 871-878 (2008) - [j3]Win Chaivipas, Kenichi Okada, Akira Matsuzawa:
Spatial Sensitivity of Capacitors in Distributed Resonators and Its Application to Fine and Wide Frequency Tuning Digital Controlled Oscillators. IEICE Trans. Electron. 91-C(6): 918-927 (2008) - 2007
- [j2]Win Chaivipas, Akira Matsuzawa:
Analysis and Design of Direct Reference Feed-Forward Compensation for Fast-Settling All-Digital Phase-Locked Loop. IEICE Trans. Electron. 90-C(4): 793-801 (2007) - [j1]Philipus Chandra Oh, Akira Matsuzawa, Win Chaivipas:
A Study on Fully Digital Clock Data Recovery Utilizing Time to Digital Converter. IEICE Trans. Electron. 90-C(6): 1311-1314 (2007) - 2006
- [c1]Win Chaivipas, Akira Matsuzawa, Philipus Chandra Oh:
Feedforward compensation technique for all digital phase locked loop based synthesizers. ISCAS 2006
Coauthor Index
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