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2020 – today
- 2020
[j8]Dadian Zhou
, Junning Jiang, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 245-mA Digitally Assisted Dual-Loop Low-Dropout Regulator. IEEE J. Solid State Circuits 55(8): 2140-2150 (2020)- [c4]Martin Kinyua, Eric G. Soenen:
A 72.6 dB SNDR 14b 100 MSPS Ring Amplifier Based Pipelined SAR ADC with Dynamic Deadzone Control in 16 nm CMOS. CICC 2020: 1-4
2010 – 2019
- 2019
- [j7]Mohammad H. Naderi, Chulhyun Park, Suraj Prakash, Martin Kinyua, Eric G. Soenen, José Silva-Martínez:
A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3352-3364 (2019) - [j6]Dadian Zhou, Carlos Briseno-Vidrios, Junning Jiang, Chulhyun Park, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3373-3383 (2019) - 2018
- [j5]Carlos Briseno-Vidrios, Dadian Zhou, Suraj Prakash, Qiyuan Liu, Alexander Edward, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs. IEEE J. Solid State Circuits 53(11): 3280-3292 (2018) - 2017
- [j4]Alexander Edward, Qiyuan Liu, Carlos Briseno-Vidrios, Martin Kinyua, Eric G. Soenen, Aydin Ilker Karsilayan, José Silva-Martínez:
A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS. IEEE J. Solid State Circuits 52(2): 448-459 (2017) - [j3]Qiyuan Liu, Alexander Edward, Martin Kinyua, Eric G. Soenen, José Silva-Martínez:
A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques. IEEE J. Solid State Circuits 52(6): 1591-1604 (2017) - 2015
- [j2]Martin Kinyua, Ruopeng Wang, Eric G. Soenen:
Integrated 105 dB SNR, 0.0031% THD+N Class-D Audio Amplifier With Global Feedback and Digital Control in 55 nm CMOS. IEEE J. Solid State Circuits 50(8): 1764-1771 (2015) - 2014
- [c3]Martin Kinyua, Ruopeng Wang, Eric G. Soenen:
A 105dBA SNR, 0.0031% THD+N filterless class-D amplifier with discrete time feedback control in 55nm CMOS. CICC 2014: 1-4 - 2012
- [j1]Justin Shi, Eric G. Soenen, Alan Roth, Ying-Chih Hsu, Martin Kinyua:
Practical Considerations for a Digital Inductive-Switching DC/DC Converter With Direct Battery Connect in Deep Sub-Micron CMOS. IEEE J. Solid State Circuits 47(8): 1946-1959 (2012) - 2010
- [c2]Eric G. Soenen, Alan Roth, Justin Shi, Martin Kinyua, Justin Gaither, Elizabeth Ortynska:
A robust digital DC-DC converter with rail-to-rail output range in 40nm CMOS. ISSCC 2010: 198-199
2000 – 2009
- 2004
- [c1]Martin Kinyua, Franco Maloberti, William Gosney:
Digital background auto-calibration of DAC non-linearity in pipelined ADCs. ISCAS (1) 2004: 13-16
Coauthor Index
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