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2020 – today
- 2021
[j8]Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev:
Fault-based Built-in Self-test and Evaluation of Phase Locked Loops. ACM Trans. Design Autom. Electr. Syst. 26(3): 20:1-20:18 (2021)
2010 – 2019
- 2019
- [j7]Yanjun Li, Ender Yilmaz, Pete Sarson, Sule Ozev:
Adaptive Test for RF/Analog Circuit Using Higher Order Correlations among Measurements. ACM Trans. Design Autom. Electr. Syst. 24(4): 45:1-45:16 (2019) - [c22]Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev:
Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection. ETS 2019: 1-6 - 2018
- [c21]Srikanth Jagannathan, Kumar Abhishek, Nihaar N. Mahatme, Ender Yilmaz:
Design of aging aware 5 Gbps LVDS transmitter for automotive applications. IRPS 2018: 5 - [c20]Mehmet Ince, Ender Yilmaz, Sule Ozev:
Enabling fast process variation and fault simulation through macromodelling of analog components. NATW 2018: 1-6 - [c19]Yanjun Li, Ender Yilmaz, Peter Sarson, Sule Ozev:
Online information utility assessment for per-device adaptive test flow. VTS 2018: 1-6 - 2017
- [c18]Jae Woong Jeong, Ender Yilmaz, LeRoy Winemberg, Sule Ozev:
Built-in self-test for stability measurement of low dropout regulator. ITC 2017: 1-9 - [c17]Mehmet Ince, Ender Yilmaz, Jae Woong Jeong, LeRoy Winemberg, Sule Ozev:
Evaluation of loop transfer function based dynamic testing of LDOs. ITC-Asia 2017: 14-19 - 2015
- [j6]Ender Yilmaz, Sule Ozev:
Adaptive-Learning-Based Importance Sampling for Analog Circuit DPPM Estimation. IEEE Des. Test 32(1): 36-43 (2015) - 2014
- [j5]Ender Yilmaz, Afsaneh Nassery, Sule Ozev:
Built-In EVM Measurement With Negligible Hardware Overhead. IEEE Des. Test 31(1): 75-82 (2014) - 2013
- [j4]Ender Yilmaz, Sule Ozev, Kenneth M. Butler:
Efficient Process Shift Detection and Test Realignment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1934-1942 (2013) - [j3]Ender Yilmaz, Sule Ozev, Kenneth M. Butler:
Per-Device Adaptive Test for Analog/RF Circuits Using Entropy-Based Process Monitoring. IEEE Trans. Very Large Scale Integr. Syst. 21(6): 1116-1128 (2013) - [c16]Chandra K. H. Suresh, Ender Yilmaz, Sule Ozev, Ozgur Sinanoglu
:
Adaptive reduction of the frequency search space for multi-vdd digital circuits. DATE 2013: 292-295 - [c15]Ender Yilmaz, Geoff Shofner, LeRoy Winemberg, Sule Ozev:
Fault analysis and simulation of large scale industrial mixed-signal circuits. DATE 2013: 565-570 - [c14]Lingfei Deng, Vinay Kundur, Naveen Sai Jangala Naga, Muhlis Kenan Ozel, Ender Yilmaz, Sule Ozev, Bertan Bakkaloglu, Sayfe Kiaei, Divya Pratab, Tehmoor Dar:
Electrical calibration of spring-mass MEMS capacitive accelerometers. DATE 2013: 571-574 - [c13]Ender Yilmaz, Sule Ozev, Kenneth M. Butler:
Adaptive quality binning for analog circuits. ETS 2013: 1-6 - 2012
- [j2]Ender Yilmaz, Sule Ozev:
Test Application for Analog/RF Circuits With Low Computational Burden. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(6): 968-979 (2012) - [c12]Ender Yilmaz, Sule Ozev:
Adaptive multi-site testing for analog/mixed-signal circuits incorporating neighborhood information. ETS 2012: 1-6 - [c11]Ender Yilmaz, Sule Ozev, Ozgur Sinanoglu, Peter C. Maxwell:
Adaptive testing: Conquering process variations. ETS 2012: 1-6 - 2011
- [c10]Ender Yilmaz, Sule Ozev:
Fast and Accurate DPPM Computation Using Model Based Filtering. ETS 2011: 165-170 - [c9]Ender Yilmaz, Sule Ozev, Kenneth M. Butler:
Adaptive multidimensional outlier analysis for analog and mixed signal circuits. ITC 2011: 1-8 - [c8]Ender Yilmaz, Anne Meixner, Sule Ozev:
An industrial case study of analog fault modeling. VTS 2011: 178-183 - 2010
- [c7]Ender Yilmaz:
Accurate multi-specification DPPM estimation using layered sampling based simulation. ISQED 2010: 320-326 - [c6]Ender Yilmaz, Sule Ozev, Kenneth M. Butler:
Adaptive test flow for mixed-signal/RF circuits using learned information from device under test. ITC 2010: 674-683
2000 – 2009
- 2009
- [j1]Ender Yilmaz, Günhan Dündar:
Analog Layout Generator for CMOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(1): 32-45 (2009) - [c5]Ender Yilmaz, Sule Ozev:
Adaptive test elimination for analog/RF circuits. DAC 2009: 720-725 - [c4]Ender Yilmaz, Sule Ozev:
Defect-based test optimization for analog/RF circuits for near-zero DPPM applications. ICCD 2009: 313-318 - [c3]Ender Yilmaz, Afsaneh Nassery, Sule Ozev, Erkan Acar:
Built-in EVM measurement for OFDM transceivers using all-digital DFT. ITC 2009: 1-10 - 2008
- [c2]Ender Yilmaz, Sule Ozev:
Dynamic test scheduling for analog circuits for improved test quality. ICCD 2008: 227-233 - 2007
- [c1]Ender Yilmaz, Günhan Dündar:
New layout generator for analog CMOS circuits. ECCTD 2007: 36-39
Coauthor Index
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