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Yin-Tsung Hwang
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2020 – today
- 2023
- [c50]Wei-Sheng Kao, Yin-Tsung Hwang:
Efficient Image Aided Odometry Estimation Scheme for LiDAR Camera based SLAM Systems. GCCE 2023: 115-116 - 2022
- [c49]Ko-Yi Jiang, Hsing-Yao Wang, Chung-Bin Wu, Yin-Tsung Hwang, Chih-Peng Fan:
Quantized Lite Convolutional Neural Network Hardware Accelerator Design with FPGA for Face Direction Recognition. ICCE-TW 2022: 61-62 - [c48]Jia-Cheng Wu, Min-Jia Luo, Yin-Tsung Hwang, Ho-En Liao:
A Low Complexity Monocular Image Matching Scheme for Efficient Indoor Positioning. ICCE 2022: 1-4 - [c47]Hua-Luen Chen, Kuan-Hung Chen, Yin-Tsung Hwang, Chih-Peng Fan:
Acceleration Study of Two-Stage and Deep-Learning Based Facial Direction Detection on GPU-Based Edge Device. LifeTech 2022: 429-430 - 2021
- [j32]Tsung-Hsien Liu
, Shih-Lun Wang, You-Jia Lin, Yin-Tsung Hwang
, Chiao-En Chen
, Yuan-Sun Chu
:
Fixed-Complexity Tree Search Schemes for Detecting Generalized Spatially Modulated Signals: Algorithms and Hardware Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 68(2): 904-917 (2021) - [c46]Yin-Tsung Hwang, Kuan-Hong Chen, Chih-Peng Fan
, Yong-Kang Lai, Chung-Bin Wu
, Hsiao-Ping Tsai, Wei-Liang Lin, Kuang-Hao Lin:
iAMEC, an Intelligent Autonomous Mover for Navigation in Indoor People Rich Environments. AICAS 2021: 1-4 - [c45]Hua-Luen Chen, Chi-Chun Lai, Jie-Min Lin, Kuan-Hung Chen, Yin-Tsung Hwang, Chih-Peng Fan
:
Effective Two-Stage Processing Based Lite Deep Learning Classifier for Gender Detection. ICCE-TW 2021: 1-2 - [c44]Jia-Jhan Nian, Chu-Chen Wu, Yin-Tsung Hwang:
Ultrasound Phased Array Radar Design for Ranging and Direction of Arrival Estimation. ICCE-TW 2021: 1-2 - [c43]Kuan-Hung Chen, Yin-Tsung Hwang, Chih-Peng Fan
:
Sensor Data Fusion of Intelligent Autonomous Mover for Object Detection and Collision Avoidance in Environments with Surrounding Crowds. ICCE 2021: 1-4 - [c42]Cheng-Shun Hsiao, Chih-Peng Fan
, Yin-Tsung Hwang:
Iris Location and Recognition by Deep-Learning Networks Based Design for Biometric Authorization. LifeTech 2021: 144-145 - 2020
- [j31]Kuan-Ting Chen, Yin-Tsung Hwang
, Cheng-Yi Huang:
Design and Chip Implementation of a SMI/MVDR Dual-Mode Beamformer for Wireless MIMO Communication Systems. IEEE Access 8: 67940-67954 (2020) - [c41]Chung-Bin Wu
, Yin-Tsung Hwang, Yu-Cheng Hsueh, Yu-Kuan Hsiao:
High Efficient Bandwidth Utilization Hardware Design and Implement for AI Deep Learning Accelerator. ISOCC 2020: 193-194
2010 – 2019
- 2019
- [j30]Kuan-Ting Chen, Yin-Tsung Hwang
, Yen-Chang Liao:
VLSI Design of a High Throughput Hybrid Precoding Processor for Wireless MIMO Systems. IEEE Access 7: 85925-85936 (2019) - [j29]Chih-Peng Fan
, Yu-Cheng Fan, Yin-Tsung Hwang, Bernard Fong
:
The IEEE International Conference on Consumer Electronics-Taiwan 2018 [Conference Reports]. IEEE Consumer Electron. Mag. 8(2): 7-8 (2019) - [j28]Tsung-Hsien Liu
, You-Zhi Ye, Chen-Kai Huang, Chiao-En Chen
, Yin-Tsung Hwang
, Yuan-Sun Chu
:
A Low-Complexity Maximum Likelihood Detector for the Spatially Modulated Signals: Algorithm and Hardware Implementation. IEEE Trans. Circuits Syst. II Express Briefs 66-II(11): 1820-1824 (2019) - [c40]Kuang-Ying Chang, Kuan-Ting Chen, Wei-Hsuan Ma, Yin-Tsung Hwang:
An Enhanced MUSIC DoA Scanning Scheme for Array Radar Sensing in Autonomous Movers. AICAS 2019: 152-153 - [c39]Shih-Chieh Lin, Min-Chi Lin, Yin-Tsung Hwang, Chih-Peng Fan
:
Deep-Learning Based Pedestrian Direction Detection for Anti-collision of Intelligent Self-propelled Vehicles. GCCE 2019: 387-388 - [c38]Wei-Hsuan Ma, Kuan-Ying Chang, Kuan-Ting Chen, Yin-Tsung Hwang, Jin-Fa Lin:
Projection Matching Pursuit based DoA Estimation Scheme and its FPGA Implementation. ISOCC 2019: 109-110 - [c37]Kuan-Hung Chen, Jesse Der-Chian Deng, Yin-Tsung Hwang:
A High-Performance Pedestrian Detector and Its Implementation on Embedded Systems for Hypermarket Environment. ISOCC 2019: 154-155 - 2017
- [j27]Jin-Fa Lin
, Ming-Hwa Sheu, Yin-Tsung Hwang, Chen-Syuan Wong, Ming-Yan Tsai:
Low-Power 19-Transistor True Single-Phase Clocking Flip-Flop Design Based on Logic Structure Reduction Schemes. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3033-3044 (2017) - [c36]Yu-Wei Cheng, Yin-Tsung Hwang:
Development of a high throughput image compression system for optical remote sensing. DSC 2017: 539-540 - 2016
- [j26]Ming-Hwa Sheu, Siang-Min Siao, Yin-Tsung Hwang, Chi-Chia Sun, You-Ping Lin:
New adaptable three-moduli set {2n+k, 2n - 1, 2n-1 - 1} for residue number system-based finite impulse response implementation. IEICE Electron. Express 13(11): 20160090 (2016) - [c35]Shin-Shiang Wang, Yi-Chi Tien, Yin-Tsung Hwang, Jin-Fa Lin, Guo-Zua Wu:
MVDR based adaptive beamformer design and its FPGA implementation for ultrasonic imaging. APCCAS 2016: 143-145 - [c34]Ciao-Kai Yu, Bing-Chen Tsai, Yin-Tsung Hwang:
An efficient motion blurred image restoration scheme based on frequency domain estimation. ICCE-TW 2016: 1-2 - 2015
- [j25]Yin-Tsung Hwang, Ming-Wei Lyu, Cheng-Chen Lin:
A Low-Complexity Embedded Compression Codec Design With Rate Control for High-Definition Video. IEEE Trans. Circuits Syst. Video Technol. 25(4): 674-687 (2015) - [j24]Jing-Shiun Lin, Yin-Tsung Hwang, Shih-Hao Fang, Po-Han Chu, Ming-Der Shieh:
Low-Complexity High-Throughput QR Decomposition Design for MIMO Systems. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2342-2346 (2015) - [j23]Ching-Te Chiu, Lei Wang, Yin-Tsung Hwang:
Editorial: Signal Processing for Communication/Biomedical Systems and Reliability Improvement. J. Signal Process. Syst. 78(1): 1-3 (2015) - [c33]Yin-Tsung Hwang, Hung-Ruey Wen, Bing-Chen Tsai:
Efficient block adaptive point spread function estimation and out-of-focus image restoration scheme. ICCE-TW 2015: 388-389 - [c32]Yin-Tsung Hwang, Kuan-Ting Chen, Chau-Kai Wu:
A high throughput unified SVD/QRD precoder design for MIMO OFDM systems. DSP 2015: 1148-1151 - 2014
- [j22]Yin-Tsung Hwang, Wei-Da Chen, Cheng-Ru Hong:
A Low Complexity Geometric Mean Decomposition Computing Scheme and Its High Throughput VLSI Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(4): 1170-1182 (2014) - [c31]Yin-Tsung Hwang, Bing Cheng Tsai, Yu-Ting Pai, Ming-Hwa Sheu:
Feature Points Based Video Object Tracking for Dynamic Scenes and Its FPGA System Prototyping. IIH-MSP 2014: 325-328 - [c30]Yin-Tsung Hwang, Jiun-Yan Chen:
An IP interface design compiler with SystemC based input specifications. NEWCAS 2014: 149-152 - 2013
- [j21]Wei-Da Chen, Yin-Tsung Hwang:
A Constant Throughput Geometric Mean Decomposition Scheme Design for Wireless MIMO Precoding. IEEE Trans. Veh. Technol. 62(5): 2080-2090 (2013) - [c29]Yin-Tsung Hwang, Yi-Yo Chen:
Design and implementation of a high throughput soft output MIMO detector. SiPS 2013: 124-129 - 2012
- [j20]Ming-Der Shieh, Yin-Tsung Hwang, Hanho Lee, Chirn Chye Boon
, Zhiyuan Yan:
Implementations of Signal-Processing Algorithms for OFDM Systems. J. Electr. Comput. Eng. 2012: 687172:1-687172:2 (2012) - [j19]Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu:
Low-Power Pulse-Triggered Flip-Flop Design With Conditional Pulse-Enhancement Scheme. IEEE Trans. Very Large Scale Integr. Syst. 20(2): 361-366 (2012) - [j18]Yin-Tsung Hwang, Jin-Fa Lin:
Low Voltage and Low Power Divide-By-2/3 Counter Design Using Pass Transistor Logic Circuit Technique. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1738-1742 (2012) - [c28]Yin-Tsung Hwang, Yi-Chih Chen, Cheng-Ru Hong, Yu-Ting Pei, Chi-Ho Chang, Jui-Chi Huang:
Design and FPGA implementation of a FMCW radar baseband processor. APCCAS 2012: 392-395 - [c27]Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu:
Low power 10-transistor full adder design based on degenerate pass transistor logic. ISCAS 2012: 496-499 - [c26]Yin-Tsung Hwang, Tao-Hsing Huang:
Efficient TWIN-VQ audio decoder implementation on a configurable processor using instruction extension. ISCAS 2012: 1010-1013 - [c25]Jing-Shiun Lin, Yin-Tsung Hwang, Po-Han Chu, Ming-Der Shieh, Shih-Hao Fang:
An efficient QR decomposition design for MIMO systems. ISCAS 2012: 1508-1511 - [c24]Yin-Tsung Hwang, Sung-Jun Tsai, Yi-Yo Chen:
Design and implementation of an optical OFDM baseband receiver in FPGA. VLSI-DAT 2012: 1-4 - 2011
- [j17]Yin-Tsung Hwang, Cheng-Chen Lin, Ruei-Ting Hung:
Lossless Hyperspectral Image Compression System-Based on HW/SW Codesign. IEEE Embed. Syst. Lett. 3(1): 20-23 (2011) - [j16]Yin-Tsung Hwang, Wei-Da Chen:
Design and implementation of a high-throughput fully parallel complex-valued QR factorisation chips. IET Circuits Devices Syst. 5(5): 424-432 (2011) - [j15]Cheng-Chen Lin, Yin-Tsung Hwang:
Lossless Compression of Hyperspectral Images Using Adaptive Prediction and Backward Search Schemes. J. Inf. Sci. Eng. 27(2): 419-435 (2011) - [c23]Yin-Tsung Hwang, Feng-Ming Chang, Shin-Wen Chen:
Low complexity baseband transceiver design for narrow band power line communication. ISCAS 2011: 442-445 - 2010
- [j14]Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu:
A Low Complexity Low Power Signal Transition Detector Design for Self-Timed Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(4): 843-845 (2010) - [j13]Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu:
Low Power Pulse Generator Design Using Hybrid Logic. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(6): 1266-1268 (2010) - [j12]Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu:
A Low Complexity Dual-Mode Pulse-Triggered Flip-Flop Design Based on Unified AND/XNOR Logic. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2755-2757 (2010) - [j11]Cheng-Chen Lin, Yin-Tsung Hwang:
An Efficient Lossless Compression Scheme for Hyperspectral Images Using Two-Stage Prediction. IEEE Geosci. Remote. Sens. Lett. 7(3): 558-562 (2010) - [c22]Yin-Tsung Hwang, Chen-Cheng Lin, Ming-Wei Lyu:
Design and implementation of a low complexity lossless video codec. APCCAS 2010: 556-559 - [c21]Cheng-Chen Lin, Yin-Tsung Hwang, Yi-Chen Chang, Jiun-Jiang Chen, Ming-Wei Lyu:
Lossless Coding of Multiband Images Using Interband Data Correlation and Error Feedback Prediction Scheme. IIH-MSP 2010: 280-283 - [c20]Yin-Tsung Hwang, Wei-Da Chen:
MMSE-QR factorization systolic array design for applications in MIMO signal detections. ISCAS 2010: 4181-4184
2000 – 2009
- 2009
- [c19]Yin-Tsung Hwang, Hua-Hsin Luo:
Automatic IP Interface Synthesis Supporting Multi-layer Communication Protocols in SoC Designs. IAS 2009: 169-172 - [c18]Chia-Peng Chou, Chien-Hsing Wu, Tsung-Hsien Liu, Yin-Tsung Hwang:
Space-Frequency-Coded MIMO OFDM Receivers Based on Gaussian Message Passing. ICC 2009: 1-4 - 2008
- [j10]Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu:
Low Complexity Dual-Mode Pulse Generator Designs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(7): 1812-1815 (2008) - [c17]Yin-Tsung Hwang, Jun-Yen Chen, Jun-Jieh Chiu:
HW/SW Auto-Coupling for Fast IP Integration in SoC Designs. ICESS 2008: 556-563 - [c16]Yin-Tsung Hwang, Wei-Da Chen:
A low complexity complex QR factorization design for signal detection in MIMO OFDM systems. ISCAS 2008: 932-935 - 2007
- [j9]Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho:
A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(5): 1050-1059 (2007) - [c15]Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu, Chia-Jen Sheu:
Low Power Multipliers Using Enhenced Row Bypassing Schemes. SiPS 2007: 136-141 - [c14]Cheng-Chen Lin, Yin-Tsung Hwang, Kwan-Hsun Tseng, Shao-Wen Chen:
Wavelet Based Lossless Video Compression Using Motion Compensated Temporal Filtering. SiPS 2007: 686-691 - 2006
- [c13]Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu, Chia-Jen Sheu:
Low Power Multiplier Designs Based on Improved Column Bypassing Schemes. APCCAS 2006: 594-597 - [c12]Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho:
A high speed and energy efficient full adder design using complementary & level restoring carry logic. ISCAS 2006 - [c11]Yin-Tsung Hwang, Jiun-Yan Chen, Ming-Hwa Sheu:
Automatic Generation of Programmable Parallel CRC & Scrambler Designs. SiPS 2006: 286-291 - 2005
- [j8]Tai-Yi Huang, Chung-Ta King, Youn-Long Steve Lin, Yin-Tsung Hwang:
The embedded software consortium of taiwan. ACM Trans. Embed. Comput. Syst. 4(3): 612-632 (2005) - [j7]Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen:
VLSI architectural design tradeoffs for sliding-window log-MAP decoders. IEEE Trans. Very Large Scale Integr. Syst. 13(4): 439-447 (2005) - [c10]Yin-Tsung Hwang, Chen-Yu Tsai, Cheng-Chen Lin:
Block-wise adaptive modulation for OFDM WLAN systems. ISCAS (6) 2005: 6098-6101 - 2004
- [j6]Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
High-Speed, Low-Complexity Systolic Designs of Novel Iterative Division Algorithms in GF(2^m). IEEE Trans. Computers 53(3): 375-380 (2004) - [c9]Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen, Hsin-Fu Lo:
VLSI architecture exploration for sliding-window Log-MAP decoders. ISCAS (2) 2004: 513-516 - 2003
- [c8]Yin-Tsung Hwang, Kuo-Wei Liao, Chien-Hsing Wu:
FPGA realization of an OFDM frame synchronization design for dispersive channels. ISCAS (2) 2003: 256-259 - 2002
- [j5]Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
Novel Algorithms and VLSI Design for Division over GF(2m). IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(5): 1129-1139 (2002) - [c7]Yin-Tsung Hwang, Cheng-Ji Chang, Bor-Liang Chen:
A rapid prototyping embedded system platform and its HW/SW communication interface generation and verification. APCCAS (1) 2002: 481-484 - [c6]Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
An area-efficient systolic division circuit over GF(2m) for secure communication. ISCAS (5) 2002: 733-736 - 2001
- [c5]Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
Systolic VLSI realization of a novel iterative division algorithm over GF(2m): a high-speed, low-complexity design. ISCAS (4) 2001: 33-36 - [c4]Yin-Tsung Hwang, Jih-Cheng Han, Jing-Yi Liu:
Design and implementation of channel equalizers for block transmission systems. ISCAS (4) 2001: 354-357
1990 – 1999
- 1998
- [j4]Yin-Tsung Hwang, Jer-Sho Hwang:
Simulated Evolution Based Parallel Code Generation for Programmable DSP Processors. J. Inf. Sci. Eng. 14(1): 139-165 (1998) - [j3]Yin-Tsung Hwang, Yuan-Hung Wang, Jer-Sho Hwang:
Rapid Prototyping of Hardware / Software Codesign for Embedded Signal Processing. J. Inf. Sci. Eng. 14(3): 605-632 (1998) - [c3]Yin-Tsung Hwang, Yuan-Hung Wang:
Communication and Interface Synthesis on a Rapid Prototyping Hardware/Software Codesign System. ISSS 1998: 76-82 - 1996
- [c2]Ching-Long Su, Yin-Tsung Hwang:
Distributed arithmetic-based architectures for high speed IIR filter design. ICPADS 1996: 156-161 - 1995
- [j2]Yin-Tsung Hwang, Yu Hen Hu:
A unified partitioning and scheduling scheme for mapping multi-stage regular iterative algorithms onto processor arrays. J. VLSI Signal Process. 11(1-2): 133-150 (1995) - 1992
- [j1]Yin-Tsung Hwang, Yu Hen Hu:
MSSM - A design aid for multi-stage systolic mapping. J. VLSI Signal Process. 4(2-3): 125-145 (1992) - [c1]Yin-Tsung Hwang, Yu Hen Hu:
On systolic mapping of multi-stage algorithms. ASAP 1992: 47-61
Coauthor Index
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