BibTeX records: Michael Zelikson

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@article{DBLP:journals/jssc/LuriaSZL16,
  author    = {Kosta Luria and
               Joseph Shor and
               Michael Zelikson and
               Alex Lyakhov},
  title     = {Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off
               Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm},
  journal   = {{IEEE} J. Solid State Circuits},
  volume    = {51},
  number    = {3},
  pages     = {752--762},
  year      = {2016},
  url       = {https://doi.org/10.1109/JSSC.2015.2512387},
  doi       = {10.1109/JSSC.2015.2512387},
  timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/jssc/LuriaSZL16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/FaynehYKZATSR16,
  author    = {Eyal Fayneh and
               Marcelo Yuffe and
               Ernest Knoll and
               Michael Zelikson and
               Muhammad Abozaed and
               Yair Talker and
               Ziv Shmuely and
               Saher Abu Rahme},
  title     = {4.1 14nm 6th-generation Core processor SoC with low power consumption
               and improved performance},
  booktitle = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2016, San Francisco, CA, USA, January 31 - February 4, 2016},
  pages     = {72--73},
  publisher = {{IEEE}},
  year      = {2016},
  url       = {https://doi.org/10.1109/ISSCC.2016.7417912},
  doi       = {10.1109/ISSCC.2016.7417912},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/FaynehYKZATSR16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LuriaSZL15,
  author    = {Kosta Luria and
               Joseph Shor and
               Michael Zelikson and
               Alex Lyakhov},
  title     = {8.7 Dual-use low-drop-out regulator/power gate with linear and on-off
               conduction modes for microprocessor on-die supply voltages in 14nm},
  booktitle = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2015, Digest of Technical Papers, San Francisco, CA, USA, February
               22-26, 2015},
  pages     = {1--3},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/ISSCC.2015.7062973},
  doi       = {10.1109/ISSCC.2015.7062973},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/LuriaSZL15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/YuffeMKSKAFLZ12,
  author    = {Marcelo Yuffe and
               Moty Mehalel and
               Ernest Knoll and
               Joseph Shor and
               Tsvika Kurts and
               Eran Altshuler and
               Eyal Fayneh and
               Kosta Luria and
               Michael Zelikson},
  title     = {A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller
               32-nm Processor},
  journal   = {{IEEE} J. Solid State Circuits},
  volume    = {47},
  number    = {1},
  pages     = {194--205},
  year      = {2012},
  url       = {https://doi.org/10.1109/JSSC.2011.2167814},
  doi       = {10.1109/JSSC.2011.2167814},
  timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/jssc/YuffeMKSKAFLZ12.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/SizikovKFZ10,
  author    = {Gregory Sizikov and
               Avinoam Kolodny and
               Eby G. Friedman and
               Michael Zelikson},
  title     = {Efficiency optimization of integrated {DC-DC} buck converters},
  booktitle = {17th {IEEE} International Conference on Electronics, Circuits, and
               Systems, {ICECS} 2010, Athens, Greece, 12-15 December, 2010},
  pages     = {1208--1211},
  publisher = {{IEEE}},
  year      = {2010},
  url       = {https://doi.org/10.1109/ICECS.2010.5724735},
  doi       = {10.1109/ICECS.2010.5724735},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/icecsys/SizikovKFZ10.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/BruckZ04,
  author    = {Yuri Bruck and
               Michael Zelikson},
  title     = {Two novel cross-cascode differential amplifiers},
  booktitle = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
               Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
               2004},
  pages     = {13--16},
  publisher = {{IEEE}},
  year      = {2004},
  url       = {https://doi.org/10.1109/ICECS.2004.1399602},
  doi       = {10.1109/ICECS.2004.1399602},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/icecsys/BruckZ04.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GorenZGWBALSTGPJSSDH03,
  author    = {David Goren and
               Michael Zelikson and
               Rachel Gordin and
               Israel A. Wagner and
               Anastasia Barger and
               Alon Amir and
               Betty Livshitz and
               Anatoly Sherman and
               Youri Tretiakov and
               Robert A. Groves and
               J. Park and
               Donald L. Jordan and
               Sue E. Strang and
               Raminderpal Singh and
               Carl E. Dickey and
               David L. Harame},
  title     = {On-chip interconnect-aware design and modeling methodology, based
               on high bandwidth transmission line devices},
  booktitle = {Proceedings of the 40th Design Automation Conference, {DAC} 2003,
               Anaheim, CA, USA, June 2-6, 2003},
  pages     = {724--727},
  publisher = {{ACM}},
  year      = {2003},
  url       = {https://doi.org/10.1145/775832.776017},
  doi       = {10.1145/775832.776017},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/GorenZGWBALSTGPJSSDH03.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GorenZGGLASW02,
  author    = {David Goren and
               Michael Zelikson and
               Tiberiu C. Galambos and
               Rachel Gordin and
               Betty Livshitz and
               Alon Amir and
               Anatoly Sherman and
               Israel A. Wagner},
  title     = {An Interconnect-Aware Methodology for Analog and Mixed Signal Design,
               Based on High Bandwidth (Over 40 Ghz) On-Chip Transmission Line Approach},
  booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
               {(DATE} 2002), 4-8 March 2002, Paris, France},
  pages     = {804--811},
  publisher = {{IEEE} Computer Society},
  year      = {2002},
  url       = {https://doi.org/10.1109/DATE.2002.998391},
  doi       = {10.1109/DATE.2002.998391},
  timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl    = {https://dblp.org/rec/conf/date/GorenZGGLASW02.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BruckZB00,
  author    = {Yuri Bruck and
               Michael Zelikson and
               Gennady Burdo},
  title     = {Novel design technique for highly linear current mode amplifiers.
               Analysis, design, simulations},
  booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
               Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
               May 2000, Proceedings},
  pages     = {695--698},
  publisher = {{IEEE}},
  year      = {2000},
  url       = {https://doi.org/10.1109/ISCAS.2000.857190},
  doi       = {10.1109/ISCAS.2000.857190},
  timestamp = {Sun, 22 Oct 2017 13:09:25 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/BruckZB00.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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