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ORCIDNorbert Wehn
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- affiliation: University of Kaiserslautern
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2020 – today
- 2021
[c205]Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro:
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC 2021: 35-42- [c204]Matthias Jung, Christian Weis, Norbert Wehn:
The Dynamic Random Access Memory Challenge in Embedded Computing Systems. A Journey of Embedded and Cyber-Physical Systems 2021: 19-36 - 2020
- [j40]Carl Christian Rheinländer, Norbert Wehn:
Harvester-aware transient computing: Utilizing the mechanical inertia of kinetic energy harvesters for a proactive frequency-based power loss detection. Integr. 75: 122-130 (2020) - [j39]Mhd Rashed Al Koutayni
, Vladimir Rybalkin, Jameel Malik, Ahmed Elhayek, Christian Weis, Gerd Reis, Norbert Wehn, Didier Stricker:
Real-Time Energy Efficient Hand Pose Estimation: A Case Study. Sensors 20(10): 2828 (2020) - [j38]Florian Gensheimer, Tobias Dietz, Kira Kraft, Stefan Ruzika, Norbert Wehn:
A Reduced-Complexity Projection Algorithm for ADMM-Based LP Decoding. IEEE Trans. Inf. Theory 66(8): 4819-4833 (2020) - [j37]Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng:
Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 92(11): 1219-1245 (2020) - [j36]Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. 92(11): 1323-1343 (2020) - [c203]Taha Soliman, Ricardo Olivo, Tobias Kirchner, Cecilia De la Parra, Maximilian Lederer, Thomas Kämpfe, Andre Guntoro, Norbert Wehn:
Efficient FeFET Crossbar Accelerator for Binary Neural Networks. ASAP 2020: 109-112 - [c202]Frederik Lauer, Carl Christian Rheinländer, Claus Kestel, Norbert Wehn:
Analysis and Optimization of TLS-based Security Mechanisms for Low Power IoT Systems. CCGRID 2020: 775-780 - [c201]Johannes Feldmann, Kira Kraft, Lukas Steiner, Norbert Wehn, Matthias Jung:
Fast and Accurate DRAM Simulation: Can we Further Accelerate it? DATE 2020: 364-369 - [c200]Jochen Mades, Gerd Ebelt, Boris Janjic, Frederik Lauer, Carl Christian Rheinländer, Norbert Wehn:
TLS-Level Security for Low Power Industrial IoT Network Infrastructures. DATE 2020: 1720-1721 - [c199]Vladimir Rybalkin, Norbert Wehn:
When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. FPGA 2020: 111-121 - [c198]Stefan Weithoffer, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard:
Fully Pipelined Iteration Unrolled Decoders the Road to TB/S Turbo Decoding. ICASSP 2020: 5115-5119 - [c197]Éder F. Zulian, Christian Weis, Norbert Wehn:
Access-Aware Per-Bank DRAM Refresh for Reduced DRAM Refresh Overhead. ISCAS 2020: 1-5 - [c196]Claus Kestel, Lucas Johannsen, Oliver Griebel, Jhon Jimenez, Timo Vogt, Timo Lehnigk-Emden, Norbert Wehn:
A 506Gbit/s Polar Successive Cancellation List Decoder with CRC. PIMRC 2020: 1-7 - [c195]Stefan Weithoffer, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard:
Low-complexity Computational Units for the Local-SOVA Decoding Algorithm. PIMRC 2020: 1-6 - [c194]Jasmin Jahic, Thomas Bauer, Thomas Kuhn, Norbert Wehn, Pablo Oliveira Antonino:
FERA: A Framework for Critical Assessment of Execution Monitoring Based Approaches for Finding Concurrency Bugs. SAI (1) 2020: 54-74 - [c193]Lukas Steiner, Matthias Jung, Felipe S. Prado, Kirill Bykov, Norbert Wehn:
DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator. SAMOS 2020: 110-126 - [c192]Stefan Weithoffer, Oliver Griebel, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn:
Advanced Hardware Architectures for Turbo Code Decoding Beyond 100 Gb/s. WCNC 2020: 1-6 - [i11]Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian:
The gem5 Simulator: Version 20.0+. CoRR abs/2007.03152 (2020)
2010 – 2019
- 2019
- [c191]Timo Lehnigk-Emden, Matthias Alles, Claus Kestel, Norbert Wehn:
Polar Code Decoder Framework. DATE 2019: 1208-1209 - [c190]Matthias Jung, Frank Schnicke, Markus Damm, Thomas Kuhn, Norbert Wehn:
Speculative Temporal Decoupling Using fork(). DATE 2019: 1721-1726 - [c189]Jasmin Jahic, Varun Kumar, Matthias Jung, Gerhard Wirrer, Norbert Wehn, Thomas Kuhn:
Rapid Identification of Shared Memory in Multithreaded Embedded Systems with Static Scheduling. ICPP Workshops 2019: 15:1-15:8 - [c188]Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn:
An In-DRAM Neural Network Processing Engine. ISCAS 2019: 1-5 - [c187]Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn:
Fast validation of DRAM protocols with timed petri nets. MEMSYS 2019: 133-147 - [c186]Carl Christian Rheinländer, Norbert Wehn:
Adaptive Transient Computing for Power-Neutral Embedded Devices. PATMOS 2019: 63-68 - [c185]Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Norbert Wehn, Andreas Dengel:
iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction. ReConFig 2019: 1-8 - [c184]Deepak M. Mathew, André Lucas Chinazzo, Christian Weis, Matthias Jung, Bastien Giraud, Pascal Vivet, Alexandre Levisse, Norbert Wehn:
RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. SAMOS 2019: 34-47 - [c183]Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn:
A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. SAMOS 2019: 429-441 - [c182]Norbert Wehn:
Wednesday Keynote: The Memory Wall: Challenges and Solutions. SoCC 2019: 1-2 - [i10]Florian Gensheimer, Tobias Dietz, Kira Kraft, Stefan Ruzika, Norbert Wehn:
A Reduced-Complexity Projection Algorithm for ADMM-based LP Decoding. CoRR abs/1901.03240 (2019) - [i9]Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR abs/1911.00889 (2019) - 2018
- [j35]Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian de Schryver, Christian Weis, Norbert Wehn, Katharina Anna Zweig:
A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs. IEEE Des. Test 35(1): 7-15 (2018) - [j34]Stefan Weithoffer, Norbert Wehn:
Low-Latency CRC Calculation in Turbo-Code Decoding. Int. J. Wirel. Inf. Networks 25(1): 98-107 (2018) - [c181]Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung:
An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. DATE 2018: 293-296 - [c180]A. Cristiano I. Malossi, Michael Schaffner, Anca Molnos, Luca Gammaitoni, Giuseppe Tagliavini, Andrew Emerson, Andrés Tomás, Dimitrios S. Nikolopoulos, Eric Flamand, Norbert Wehn:
The transprecision computing paradigm: Concept, design, and applications. DATE 2018: 1105-1110 - [c179]Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung:
Improving the error behavior of DRAM by exploiting its Z-channel property. DATE 2018: 1492-1495 - [c178]Vladimir Rybalkin, Syed Saqib Bukhari, Muhammad Mohsin Ghaffar, Aqib Ghafoor, Norbert Wehn, Andreas Dengel:
iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing: Percentile Based Binarization. DocEng 2018: 24:1-24:8 - [c177]Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott:
FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. FPL 2018: 89-96 - [c176]Florian Gensheimer, Tobias Dietz, Stefan Ruzika, Kira Kraft, Norbert Wehn:
Improved Maximum-Likelihood Decoding Using Sparse Parity-Check Matrices. ICT 2018: 236-240 - [c175]Menbere Kina Tekleyohannes, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist:
A Reconfigurable Accelerator for Morphological Operations. IPDPS Workshops 2018: 186-193 - [c174]Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn:
The Role of Memories in Transprecision Computing. ISCAS 2018: 1-5 - [c173]Florian Gensheimer, Tobias Dietz, Stefan Ruzika, Kira Kraft, Norbert Wehn:
A Low-Complexity Projection Algorithm for ADMM-Based LP Decoding. ISTC 2018: 1-5 - [c172]Claus Kestel, Matthias Herrmann, Norbert Wehn:
When Channel Coding Hits the Implementation Wall. ISTC 2018: 1-6 - [c171]Stefan Weithoffer, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard, Claude Berrou:
25 Years of Turbo Codes: From Mb/s to beyond 100 Gb/s. ISTC 2018: 1-6 - [c170]Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos:
Efficient coding scheme for DDR4 memory subsystems. MEMSYS 2018: 148-157 - [c169]Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn:
Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. MEMSYS 2018: 377-386 - [c168]Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper:
Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant. DMLE/IOTSTREAMING@PKDD/ECML 2018: 5-20 - [c167]Jasmin Jahic, Matthias Jung, Thomas Kuhn, Claus Kestel, Norbert Wehn:
A Framework for Non-intrusive Trace-driven Simulation of Manycore Architectures with Dynamic Tracing Configuration. RV 2018: 458-468 - [c166]Jasmin Jahic, Thomas Kuhn, Matthias Jung, Norbert Wehn:
BOSMI: a framework for non-intrusive monitoring and testing of embedded multithreaded software on the logical level. SAMOS 2018: 131-138 - [i8]Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn:
Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact. CoRR abs/1803.07613 (2018) - [i7]Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott:
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs. CoRR abs/1807.04093 (2018) - [i6]Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper:
Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant. CoRR abs/1808.08784 (2018) - 2017
- [j33]Matthias Jung, Deepak M. Mathew, Carl Christian Rheinländer, Christian Weis, Norbert Wehn:
A Platform to Analyze DDR3 DRAM's Power and Retention Time. IEEE Des. Test 34(4): 52-59 (2017) - [j32]Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn:
3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems. Int. J. Parallel Program. 45(6): 1420-1460 (2017) - [j31]Christian Weis, Abdul Mutaal, Omar Naji, Matthias Jung, Andreas Hansson, Norbert Wehn:
DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool. Int. J. Parallel Program. 45(6): 1566-1591 (2017) - [j30]Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn:
A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. J. Signal Process. Syst. 87(3): 327-341 (2017) - [c165]Stefan Weithoffer, Kira Kraft, Norbert Wehn:
Bit-level pipelining for highly parallel turbo-code decoders: A critical assessment. AFRICON 2017: 121-126 - [c164]Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis:
A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC 2017: 47:1-47:6 - [c163]Menbere Tekleyohannes, MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist:
An advanced embedded architecture for connected component analysis in industrial applications. DATE 2017: 734-735 - [c162]Vladimir Rybalkin, Norbert Wehn, Mohammad Reza Yousefi, Didier Stricker:
Hardware architecture of Bidirectional Long Short-Term Memory Neural Network for Optical Character Recognition. DATE 2017: 1390-1395 - [c161]Stefan Weithoffer, Norbert Wehn:
Enhanced decoding for high-rate LTE Turbo-Codes with short block lengths. ICC Workshops 2017: 967-972 - [c160]Javier Alejandro Varela, Norbert Wehn, Qian Liang, Songyin Tang:
Exploiting Decoupled OpenCL Work-Items with Data Dependencies on FPGAs: A Case Study. IPDPS Workshops 2017: 124-131 - [c159]Javier Alejandro Varela, Norbert Wehn:
Near Real-Time Risk Simulation of Complex Portfolios on Heterogeneous Computing Systems with OpenCL. IWOCL 2017: 2:1-2:10 - [c158]Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn:
Integrating DRAM power-down modes in gem5 and quantifying their impact. MEMSYS 2017: 86-95 - [c157]Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn:
Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS 2017: 115-124 - [c156]Deepak M. Mathew, Éder F. Zulian, Subash Kannoth, Matthias Jung, Christian Weis, Norbert Wehn:
A Bank-Wise DRAM Power Model for System Simulations. RAPIDO 2017: 5 - [c155]Christian Menard, Jerónimo Castrillón, Matthias Jung, Norbert Wehn:
System simulation with gem5 and SystemC: The keystone for full interoperability. SAMOS 2017: 62-69 - [c154]Matthias Jung, Kira Kraft, Norbert Wehn:
A new state model for DRAMs using Petri Nets. SAMOS 2017: 221-226 - [c153]Jasmin Jahic, Thomas Kuhn, Matthias Jung, Norbert Wehn:
Supervised testing of concurrent software in embedded systems. SAMOS 2017: 233-238 - [c152]Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper:
TensorQuant: A Simulation Toolbox for Deep Neural Network Quantization. MLHPC@SC 2017: 1:1-1:8 - [c151]Javier Alejandro Varela, Norbert Wehn, Sascha Desmettre, Ralf Korn:
Real-Time Financial Risk Measurement of Dynamic Complex Portfolios with Python and PyOpenCL. PyHPC@SC 2017: 3:1-3:10 - [c150]Stefan Weithoffer, Matthias Herrmann, Claus Kestel, Norbert Wehn:
Advanced wireless digital baseband signal processing beyond 100 Gbit/s. SiPS 2017: 1-6 - [c149]Norbert Wehn:
The memory challenge in computing systems: A survey. SoCC 2017: 1-2 - [c148]Norbert Wehn:
The memory challenge in computing systems: A survey. SoCC 2017: 1 - [i5]Dominik Marek Loroch, Norbert Wehn, Franz-Josef Pfreundt, Janis Keuper:
TensorQuant - A Simulation Toolbox for Deep Neural Network Quantization. CoRR abs/1710.05758 (2017) - 2016
- [j29]Christian Brugger, Gongda Liu, Christian de Schryver, Norbert Wehn:
Precision-tuning and hybrid pricer for closed-form solution-based Heston calibration. Concurr. Comput. Pract. Exp. 28(3): 892-904 (2016) - [j28]Matthias Jung, Christian Weis, Norbert Wehn:
A cross layer approach for efficient thermal management in 3D stacked SoCs. Microelectron. Reliab. 61: 43-47 (2016) - [j27]Christian Brugger, André Lucas Chinazzo, Alexandre Flores John, Christian de Schryver, Norbert Wehn, Wolfgang Eugen Schlauch, Katharina Anna Zweig:
Increasing sampling efficiency for the fixed degree sequence model with phase transitions. Soc. Netw. Anal. Min. 6(1): 100:1-100:14 (2016) - [c147]Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn:
Efficient reliability management in SoCs - an approximate DRAM perspective. ASP-DAC 2016: 390-394 - [c146]Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn:
Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM. DAC 2016: 100:1-100:4 - [c145]Philipp Schläfer, Chu-Hsiang Huang, Clayton Schoeny, Christian Weis, Yao Li, Norbert Wehn, Lara Dolecek:
Error resilience and energy efficiency: An LDPC decoder design study. DATE 2016: 588-593 - [c144]Stefan Scholl, Philipp Schläfer, Norbert Wehn:
Saturated min-sum decoding: An "afterburner" for LDPC decoder hardware. DATE 2016: 1219-1224 - [c143]Marcus Schmidt, Carl Christian Rheinländer, Sebastian Wille, Norbert Wehn, Thomas Jaitner:
IMU-based determination of fatigue during long sprint. UbiComp Adjunct 2016: 899-903 - [c142]Stefan Weithoffer, Frederic Pohl, Norbert Wehn:
On the applicability of trellis compression to Turbo-Code decoder hardware architectures. ISTC 2016: 61-65 - [c141]Florian Gensheimer, Stefan Ruzika, Stefan Scholl, Norbert Wehn:
ADMM versus simplex algorithm for LP decoding. ISTC 2016: 211-215 - [c140]Stefan Scholl, Stefan Weithoffer, Norbert Wehn:
Advanced iterative channel coding schemes: When Shannon meets Moore. ISTC 2016: 406-411 - [c139]Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn, Irene Heinrich, Marco V. Natale, Sven O. Krumke:
ConGen: An Application Specific DRAM Memory Controller Generator. MEMSYS 2016: 257-267 - [c138]Matthias Jung, Carl Christian Rheinländer, Christian Weis, Norbert Wehn:
Reverse Engineering of DRAMs: Row Hammer with Crosshair. MEMSYS 2016: 471-476 - [c137]Matthias Jung, Deepak M. Mathew, Éder F. Zulian, Christian Weis, Norbert Wehn:
A new bank sensitive DRAMPower model for efficient design space exploration. PATMOS 2016: 283-288 - [c136]Radhika Jagtap, Stephan Diestelhorst, Andreas Hansson, Matthias Jung, Norbert Wehn:
Exploring system performance using elastic traces: Fast, accurate and portable. SAMOS 2016: 96-105 - [c135]Vladimir Rybalkin, Philipp Schläfer, Norbert Wehn:
A New Architecture for High Speed, Low Latency NB-LDPC Check Node Processing for GF(256). VTC Spring 2016: 1-5 - 2015
- [j26]Matthias Jung, Christian Weis, Norbert Wehn:
DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. IPSJ Trans. Syst. LSI Des. Methodol. 8: 63-74 (2015) - [j25]Michael Glaß, Hananeh Aliee, Liang Chen, Mojtaba Ebrahimi, Faramarz Khosravi, Veit B. Kleeberger, Alexandra Listl, Daniel Müller-Gritschneder, Fabian Oboril, Ulf Schlichtmann, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis:
Application-aware cross-layer reliability analysis and optimization. it Inf. Technol. 57(3): 159-169 (2015) - [c134]Christian Brugger, André Lucas Chinazzo, Alexandre Flores John, Christian de Schryver, Norbert Wehn, Andreas Spitz, Katharina Anna Zweig:
Exploiting Phase Transitions for the Efficient Sampling of the Fixed Degree Sequence Model. ASONAM 2015: 308-313 - [c133]Christian Weis, Matthias Jung, Peter Ehses, Cristiano Santos, Pascal Vivet, Sven Goossens, Martijn Koedam, Norbert Wehn:
Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. DATE 2015: 495-500 - [c132]Christian Brugger, Javier Alejandro Varela, Norbert Wehn, Songyin Tang, Ralf Korn:
Reverse longstaff-schwartz american option pricing on hybrid CPU/FPGA systems. DATE 2015: 1599-1602 - [c131]Philipp Schläfer, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon:
Syndrome based check node processing of high order NB-LDPC decoders. ICT 2015: 156-162 - [c130]Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian Weis, Christian de Schryver, Katharina Anna Zweig, Norbert Wehn:
A Custom Computing System for Finding Similarties in Complex Networks. ISVLSI 2015: 262-267 - [c129]Christian Weis, Matthias Jung, Omar Naji, Norbert Wehn, Cristiano Santos, Pascal Vivet, Andreas Hansson:
Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs. ISVLSI 2015: 609-614 - [c128]Matthias Jung, Éder Zulian, Deepak M. Mathew, Matthias Herrmann, Christian Brugger, Christian Weis, Norbert Wehn:
Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs. MEMSYS 2015: 85-91 - [c127]Philipp Schläfer, Vladimir Rybalkin, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon:
A new architecture for high throughput, low latency NB-LDPC check node processing. PIMRC 2015: 1392-1397 - [c126]Stefan Weithoffer, Norbert Wehn:
Latency reduction for LTE/LTE-A turbo-code decoders by on-the-fly calculation of CRC. PIMRC 2015: 1409-1414 - [c125]Javier Alejandro Varela, Christian Brugger, Christian de Schryver, Norbert Wehn, Songyin Tang, Steffen Omland:
Exploiting the brownian bridge technique to improve longstaff-schwartz american option pricing on FPGA systems. ReConFig 2015: 1-6 - [c124]Omar Naji, Christian Weis, Matthias Jung, Norbert Wehn, Andreas Hansson:
A high-level DRAM timing, power and area exploration tool. SAMOS 2015: 149-156 - [c123]Javier Alejandro Varela, Claus Kestel, Christian de Schryver, Norbert Wehn, Sascha Desmettre, Ralf Korn:
Optimization strategies for portable code for Monte Carlo-based value-at-risk systems. WHPCF@SC 2015: 3:1-3:8 - 2014
- [j24]Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich:
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. 54(6-7): 1066-1074 (2014) - [j23]Christina Gimmler-Dumont, Norbert Wehn:
A Cross-Layer Reliability Design Methodology for Efficient, Dependable Wireless Receivers. ACM Trans. Embed. Comput. Syst. 13(4s): 137:1-137:29 (2014) - [c122]Christian Brugger, Christian de Schryver, Norbert Wehn, Steffen Omland, Mario Hefter, Klaus Ritter, Anton Kostiuk, Ralf Korn:
Mixed precision multilevel Monte Carlo on hybrid computing systems. CIFEr 2014: 215-222 - [c121]Imran Ali, Uwe Wasenmüller, Norbert Wehn:
Feedforward carrier synchronization for pilotless bursts of DVB-RCS2. CSNDSP 2014: 342-347 - [c120]Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens:
Exploiting expendable process-margins in DRAMs for run-time performance optimization. DATE 2014: 1-6 - [c119]Rainer Leupers, Norbert Wehn, Marco Roodzant, Johannes Stahl, Luca Fanucci, Albert Cohen, Bernd Janson:
Technology transfer towards Horizon 2020. DATE 2014: 1 - [c118]MohammadSadegh Sadri, Matthias Jung, Christian Weis, Norbert Wehn, Luca Benini:
Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh. DATE 2014: 1-4 - [c117]Ulf Schlichtmann, Veit Kleeberger, Jacob A. Abraham, Adrian Evans, Christina Gimmler-Dumont, Michael Glaß, Andreas Herkersdorf, Sani R. Nassif, Norbert Wehn:
Connecting different worlds - Technology abstraction for reliability-aware design and Test. DATE 2014: 1-8 - [c116]Stefan Scholl, Norbert Wehn:
Hardware implementation of a Reed-Solomon soft decoder based on information set decoding. DATE 2014: 1-6 - [c115]Victor Tomashevich, Christina Gimmler-Dumont, Christian Fesl, Norbert Wehn, Ilia Polian:
A new architecture for minimum mean square error sorted QR decomposition for MIMO wireless communication systems. DDECS 2014: 246-249 - [c114]Christian Brugger, Christian de Schryver, Norbert Wehn:
HyPER: A runtime reconfigurable architecture for monte carlo option pricing in the Heston model. FPL 2014: 1-8 - [c113]