![](https://dblp.dagstuhl.de/img/logo.ua.320x120.png)
![](https://dblp.dagstuhl.de/img/dropdown.dark.16x16.png)
![](https://dblp.dagstuhl.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
![search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
default search action
Krishnamurthy Soumyanath
Person information
- affiliation: Intel Corporation, Circuits Research Lab, Hillsboro, OR, USA
Refine list
![note](https://dblp.dagstuhl.de/img/note-mark.dark.12x12.png)
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2010 – 2019
- 2013
- [j16]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst
, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath:
A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. IEEE J. Solid State Circuits 48(1): 91-103 (2013) - 2012
- [c25]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst
, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy:
32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver. ISSCC 2012: 62-64 - [c24]Y. William Li, Carlos Ornelas, Hyung Seok Kim, Hasnain Lakdawala, Ashoke Ravi, Krishnamurthy Soumyanath:
A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS. ISSCC 2012: 70-72 - 2011
- [j15]Hongtao Xu, Yorgos Palaskas, Ashoke Ravi, Masoud Sajadieh, Mohammed A. El-Tanani
, Krishnamurthy Soumyanath:
A Flip-Chip-Packaged 25.3 dBm Class-D Outphasing Power Amplifier in 32 nm CMOS for WLAN Application. IEEE J. Solid State Circuits 46(7): 1596-1605 (2011) - [c23]Chang-Tsung Fu, Hasnain Lakdawala, Stewart S. Taylor, Krishnamurthy Soumyanath:
A 2.5GHz 32nm 0.35mm2 3.5dB NF -5dBm P1dB fully differential CMOS push-pull LNA with integrated 34dBm T/R switch and ESD protection. ISSCC 2011: 56-58 - 2010
- [c22]Hongtao Xu, Yorgos Palaskas, Ashoke Ravi, Krishnamurthy Soumyanath:
A highly linear 25dBm outphasing power amplifier in 32nm CMOS for WLAN application. ESSCIRC 2010: 306-309
2000 – 2009
- 2009
- [j14]Jeffrey S. Walling
, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot:
A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS. IEEE J. Solid State Circuits 44(6): 1668-1678 (2009) - [j13]Hasnain Lakdawala, Y. William Li, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath:
A 1.05 V 1.6 mW, 0.45°C 3σ Resolution ΣΔ Based Temperature Sensor With Parasitic Resistance Compensation in 32 nm Digital CMOS Process. IEEE J. Solid State Circuits 44(12): 3621-3630 (2009) - [c21]Tawfiq Musah
, Sunwoo Kwon, Hasnain Lakdawala, Krishnamurthy Soumyanath, Un-Ku Moon:
A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS. CICC 2009: 1-4 - [c20]Erkan Alpman, Hasnain Lakdawala, L. Richard Carley, Krishnamurthy Soumyanath:
A 1.1V 50mW 2.5GS/s 7b Time-Interleaved C-2C SAR ADC in 45nm LP digital CMOS. ISSCC 2009: 76-77 - [c19]Y. William Li, Hasnain Lakdawala, Arijit Raychowdhury, Greg Taylor, Krishnamurthy Soumyanath:
A 1.05V 1.6mW 0.45°C 3σ-resolution ΔΣ-based temperature sensor with parasitic-resistance compensation in 32nm CMOS. ISSCC 2009: 340-341 - 2008
- [j12]Stefano Pellerano, Yorgos Palaskas, Krishnamurthy Soumyanath:
A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOS. IEEE J. Solid State Circuits 43(7): 1542-1552 (2008) - [j11]Gaurab Banerjee, Krishnamurthy Soumyanath, David J. Allstot:
Desensitized CMOS Low-Noise Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(3): 752-765 (2008) - [c18]Hiroyuki Ito, Hasnain Lakdawala, Ashoke Ravi, Stefano Pellerano, Rick Ruby, Krishnamurthy Soumyanath, Kazuya Masu
:
A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution. ESSCIRC 2008: 98-101 - [c17]Parmoon Seddighrad, Ashoke Ravi, Masoud Sajadieh, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOS. ESSCIRC 2008: 202-205 - [c16]Pukar Malla, Hasnain Lakdawala, Kevin T. Kornegay
, Krishnamurthy Soumyanath:
A 28mW Spectrum-Sensing Reconfigurable 20MHz 72dB-SNR 70dB-SNDR DT ΔΣ ADC for 802.11n/WiMAX Receivers. ISSCC 2008: 496-497 - [c15]Jeffrey S. Walling
, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot:
A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation. ISSCC 2008: 566-567 - 2007
- [c14]Stefano Pellerano, Yorgos Palaskas, Krishnamurthy Soumyanath:
A 64GHz 6.5 dB NF 15.5 dB gain LNA in 90nm CMOS. ESSCIRC 2007: 352-355 - 2006
- [j10]Mostafa Elmala, Jeyanandh Paramesh, Krishnamurthy Soumyanath:
A 90-nm CMOS Doherty power amplifier with minimum AM-PM distortion. IEEE J. Solid State Circuits 41(6): 1323-1332 (2006) - [j9]Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process. IEEE J. Solid State Circuits 41(8): 1757-1763 (2006) - [j8]Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, Brent R. Carlton, Mostafa A. Elmala, Ralph E. Bishop, Gaurab Banerjee, Rich B. Nicholls, Stanley K. Ling, Nati Dinur, Stewart S. Taylor, Krishnamurthy Soumyanath:
A 5-GHz 108-Mb/s 2 $\times$2 MIMO Transceiver RFIC With Fully Integrated 20.5-dBm ${\rm P}_{\rm 1dB}$ Power Amplifiers in 90-nm CMOS. IEEE J. Solid State Circuits 41(12): 2746-2756 (2006) - [c13]Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, Brent R. Carlton, Mostafa A. Elmala, Ralph E. Bishop, Gaurab Banerjee, Rich B. Nicholls, Stanley K. Ling, Stewart S. Taylor, Krishnamurthy Soumyanath:
A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS. ISSCC 2006: 1420-1429 - 2005
- [j7]Jeyanandh Paramesh, Ralph Bishop, Krishnamurthy Soumyanath, David J. Allstot:
A four-antenna receiver in 90-nm CMOS for beamforming and spatial diversity. IEEE J. Solid State Circuits 40(12): 2515-2524 (2005) - [c12]Yorgos Palaskas, Ralph E. Bishop, Ashoke Ravi, Krishnamurthy Soumyanath:
A 90-nm MOS-only 3-11GHz transmitter for UWB. CICC 2005: 165-168 - [c11]Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 5 GHz class-AB power amplifier in 90 nm CMOS with digitally-assisted AM-PM correction. CICC 2005: 813-816 - [c10]Charles T. Peach, Ashoke Ravi, Rosie Bishop, Krishnamurthy Soumyanath, David J. Allstot:
A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm CMOS. ESSCIRC 2005: 535-538 - 2004
- [j6]Peter Hazucha, Tanay Karnik, Steven Walstra, Bradley A. Bloechel, James W. Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Gregory E. Dermer, Siva G. Narendra, Vivek De, Shekhar Borkar:
Measurements and analysis of SER-tolerant latch in a 90-nm dual-VT CMOS process. IEEE J. Solid State Circuits 39(9): 1536-1543 (2004) - [c9]Gaurab Banerjee, David T. Becher, Celia Hung, David J. Allstot, Krishnamurthy Soumyanath:
Measurement and modeling of noise parameters for desensitized low noise amplifiers. CICC 2004: 387-390 - [c8]Ashoke Ravi, Ralph E. Bishop, L. Richard Carley, Krishnamurthy Soumyanath:
8 GHz, 20mW, fast locking, fractional-N frequency synthesizer with optimized 3rd order, 3/5-bit IIR and 3rd order 3-bit-FIR noise shapers in 90nm CMOS. CICC 2004: 625-628 - [c7]Gaurab Banerjee, David T. Becher, Celia Hung, Krishnamurthy Soumyanath, David J. Allstot:
Desensitized design of MOS low noise amplifiers by Rn minimization. ICECS 2004: 619-622 - 2003
- [c6]Peter Hazucha, Tanay Kamik, Steven Walstra, Bradley A. Bloechel, James W. Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Greg Dermer, Siva G. Narendra, Vivek De, Shekhar Borkar:
Measurements and analysis of SER tolerant latch in a 90 nm dual-Vt CMOS process. CICC 2003: 617-620 - [c5]Luiz M. Franca-Neto
, Bradley A. Bloechel, Krishnamurthy Soumyanath:
17GHz and 24GHz LNA designs based on extended-S-parameter with microstrip-on-die in 0.18μm logic CMOS technology. ESSCIRC 2003: 149-152 - 2002
- [j5]Ram K. Krishnamurthy, Atila Alvandpour, Ganesh Balamurugan, Naresh R. Shanbhag, Krishnamurthy Soumyanath, Shekhar Y. Borkar:
A 130-nm 6-GHz 256 × 32 bit leakage-tolerant register file. IEEE J. Solid State Circuits 37(5): 624-632 (2002) - [j4]Atila Alvandpour, Ram K. Krishnamurthy, Krishnamurthy Soumyanath, Shekhar Y. Borkar:
A sub-130-nm conditional keeper technique. IEEE J. Solid State Circuits 37(5): 633-638 (2002) - [j3]Sriram R. Vangal, Mark A. Anders, Nitin Borkar, Erik Seligman, Venkatesh Govindarajulu, Vasantha Erraguntla, Howard Wilson, Amaresh Pangal, Venkat Veeramachaneni, James W. Tschanz, Yibin Ye, Dinesh Somasekhar, Bradley A. Bloechel, Gregory E. Dermer, Ram K. Krishnamurthy, Krishnamurthy Soumyanath, Sanu Mathew, Siva G. Narendra, Mircea R. Stan
, Scott Thompson, Vivek De, Shekhar Borkar:
5-GHz 32-bit integer execution core in 130-nm dual-VT CMOS. IEEE J. Solid State Circuits 37(11): 1421-1432 (2002) - 2001
- [j2]Sanu K. Mathew, Ram K. Krishnamurthy, Mark A. Anders, Rafael Rios, Kaizad R. Mistry, Krishnamurthy Soumyanath:
Sub-500-ps 64-b ALUs in 0.18-μm SOI/bulk CMOS: design and scaling trends. IEEE J. Solid State Circuits 36(11): 1636-1646 (2001) - [c4]Ram Krishnamurthy, Mark A. Anders, Krishnamurthy Soumyanath, Shekhar Borkar:
Leakage control and tolerance challenges for sub-0.1µm microprocessor circuits. ACM Great Lakes Symposium on VLSI 2001: 43-44 - [c3]Atila Alvandpour, Ram Krishnamurthy, Krishnamurthy Soumyanath, Shekhar Borkar:
A low-leakage dynamic multi-ported register file in 0.13mm CMOS. ISLPED 2001: 68-71 - 2000
- [c2]Naresh R. Shanbhag, Krishnamurthy Soumyanath, Samuel Martin:
Reliable low-power design in the presence of deep submicron noise (embedded tutorial session). ISLPED 2000: 295-302 - [c1]Ali Keshavarzi, Kaushik Roy, Charles F. Hawkins, Manoj Sachdev, Krishnamurthy Soumyanath, Vivek De:
Multiple-parameter CMOS IC testing with increased sensitivity for I_DDQ. ITC 2000: 1051-1059
1990 – 1999
- 1999
- [j1]Krishnamurthy Soumyanath, Shekhar Borkar, Chunyan Zhou, Bradley A. Bloechel:
Accurate on-chip interconnect evaluation: a time-domain technique. IEEE J. Solid State Circuits 34(5): 623-631 (1999)
Coauthor Index
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-25 05:50 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint