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ORCIDDavid Overhauser
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2000 – 2009
- 2006
[c13]Ron Wilson, David Overhauser:
Who is really responsible for quality throughout the design process?. ISQED 2006: 507- 2002
- [c12]K. Brock, C. Edwards, R. Lannoo, Ulf Schlichtmann
, Antun Domic, Jacques Benkoski, David Overhauser, M. Kliment:
Power Crisis in SoC Design: Strategies for Constructing Low-Power, High-Performance SoC Designs. DATE 2002: 538 - 2000
- [j2]Resve A. Saleh, Syed Zakir Hussain, Steffen Rochel, David Overhauser:
Clock skew verification in the presence of IR-drop in the powerdistribution network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(6): 635-644 (2000) - [c11]N. S. Nagaraj, Andrzej J. Strojwas, Sani R. Nassif, Ray Hokinson, Tak Young, Wonjae L. Kang, David Overhauser, Sung-Mo Kang:
When bad things happen to good chips (panel session). DAC 2000: 736-737
1990 – 1999
- 1999
- [c10]Syed Zakir Hussain, Steften Rochel, David Overhauser, Resve Saleh:
Clock verification in the presence of IR-drop in the power distribution network. CICC 1999: 437-440 - 1998
- [c9]Gregory Steele, David Overhauser, Steffen Rochel, Syed Zakir Hussain:
Full-Chip Verification Methods for DSM Power Distribution Systems. DAC 1998: 744-749 - [c8]Resve A. Saleh, David Overhauser, Sandy Taylor:
Full-chip verification of UDSM designs. ICCAD 1998: 453-460 - [c7]Michael Benoit, Sandy Taylor, David Overhauser, Steffen Rochel:
Power distribution in high-performance design. ISLPED 1998: 274-278 - 1995
- [j1]Jeong-Taek Kong, David Overhauser:
Methods to improve digital MOS macromodel accuracy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(7): 868-881 (1995) - [c6]Jeong-Taek Kong, David Overhauser:
Combining RC-Interconnect Effects with Nonlinear MOS Macromodels. ISCAS 1995: 570-573 - [c5]Jeong-Taek Kong, Syed Zakir Hussain, David Overhauser:
Improving Digital MOS Macromodel Accuracy. ISCAS 1995: 578-581 - [c4]Syed Zakir Hussain, David Overhauser:
Automatic Dynamic Mixed-Mode Simulation Through Network Reconfiguration. ISCAS 1995: 582-584 - [c3]Kai-Ti Huang, David Overhauser:
A Novel Graph Algorithm for Circuit Recognition. ISCAS 1995: 1695-1698
1980 – 1989
- 1989
- [b1]David Overhauser:
Fast timing simulation of MOS VLSI circuits. University of Illinois Urbana-Champaign, USA, 1989 - [c2]David Overhauser, Ibrahim N. Hajj, Yi-Fan Hsu:
Automatic mixed-mode timing simulation. ICCAD 1989: 84-87 - 1988
- [c1]David Overhauser, Ibrahim N. Hajj:
A tabular macromodeling approach to fast timing simulation including parasitics. ICCAD 1988: 70-73
Coauthor Index
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