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ORCIDDavid T. Harper III
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Journal Articles
- 1996
[j10]Jong Won Park, David T. Harper III:
An Efficient Memory System for the SIMD Construction of a Gaussian Pyramid. IEEE Trans. Parallel Distributed Syst. 7(8): 855-860 (1996)- 1995
- [j9]Douglas W. Miller, David T. Harper III:
Performance analysis of disk cache write policies. Microprocess. Microsystems 19(3): 121-130 (1995) - [j8]Whoi-Yul Kim, Poras T. Balsara, David T. Harper III, Jon Wong Park:
Hierarchy embedded differential image for progressive transmission using lossless compression. IEEE Trans. Circuits Syst. Video Technol. 5(1): 1-13 (1995) - 1994
- [j7]David T. Harper III:
A Multiaccess Frame Buffer Architecture. IEEE Trans. Computers 43(5): 618-622 (1994) - 1993
- [j6]David T. Harper III, Yashodara Costa:
Analytical Estimation of Vector Access Performance in Parallel Memory Architectures. IEEE Trans. Computers 42(5): 616-624 (1993) - 1992
- [j5]David T. Harper III:
Increased Memory Performance During Vector Accesses Through the use of Linear Address Transformations. IEEE Trans. Computers 41(2): 227-230 (1992) - 1991
- [j4]David T. Harper III, Darel A. Linebarger:
Conflict-Free Vector Access Using a Dynamic Storage Scheme. IEEE Trans. Computers 40(3): 276-283 (1991) - [j3]David T. Harper III:
Block, Multistride Vector, and FFT Accesses in Parallel Memory Systems. IEEE Trans. Parallel Distributed Syst. 2(1): 43-51 (1991) - 1990
- [j2]David T. Harper III, J. Robert Jump:
Evaluation of Reduced Bandwidth Multistage Networks. J. Parallel Distributed Comput. 9(3): 304-311 (1990) - 1987
- [j1]David T. Harper III, J. Robert Jump:
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme. IEEE Trans. Computers 36(12): 1440-1449 (1987)
Conference and Workshop Papers
- 1993
- [c9]David T. Harper III, David Tuma:
A Parallel Algorithm for Cache Miss Ratio Evaluation. MASCOTS 1993: 79-82 - 1992
- [c8]Jong Won Park, David T. Harper III:
Memory Architecture Support for the SIMD Construction of a Gaussian Pyramid. SPDP 1992: 444-451 - 1991
- [c7]David T. Harper III:
Reducing Memory Contention in Shared Memory Multiprocessors. ISCA 1991: 66-73 - 1989
- [c6]David T. Harper III:
Address Transformations to Increase Memory Performance. ICPP (1) 1989: 237-241 - [c5]David T. Harper III, Darel A. Linebarger:
A Dynamic Storage Scheme for Conflict-Free Vector Access. ISCA 1989: 72-77 - 1988
- [c4]David T. Harper III, Darel A. Linebarger:
Storage Schemes for Efficient Computation of a Radix 2 FFT in a Machine with Parallel Memories. ICPP (1) 1988: 422-425 - 1987
- [c3]David T. Harper III, J. Robert Jump:
Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks. ISCA 1987: 171-175 - 1986
- [c2]David T. Harper III, J. Robert Jump:
Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme. ISCA 1986: 324-328 - 1984
- [c1]J. Robert Jump, James D. Wise, David T. Harper III:
An interleaved array-processing architecture. AFIPS National Computer Conference 1984: 93-100
Coauthor Index
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