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2020 – today
- 2020
[j82]Ji-Hoon Lee
, Jaehyun Ko, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Body Channel Communication Technique Utilizing Decision Feedback Equalization. IEEE Access 8: 198468-198481 (2020)- [j81]Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Minseob Lee, Su-Kyoung Kim, Sangbaie Shin, Sei Kwang Hahn, Jae-Yoon Sim:
A Smart Contact Lens Controller IC Supporting Dual-Mode Telemetry With Wireless-Powered Backscattering LSK and EM-Radiated RF Transmission Using a Single-Loop Antenna. IEEE J. Solid State Circuits 55(4): 856-867 (2020) - [j80]Jaehyeong Hong, Dong Hoon Baek, Hyunwoo Son, Cheolmin Ahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A pattern-dependent injection-locked CDR for clock-embedded signaling. Microelectron. J. 96: 104708 (2020) - [j79]Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jahyun Koo, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8 Gb/s/pin, 1.96 pJ/b Transceiver With Phase-Difference-Modulation Signaling for Highly Reflective Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 2114-2127 (2020) - [j78]Jaehan Park, Cheolmin Ahn, Jaehyeong Hong, Jae-Yoon Sim:
A Picosecond-Resolution Digitally-Controlled Timing Generator With One-Clock-Latency at Arbitrary Instantaneous Input. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1544-1548 (2020) - [j77]Bumjin Park, Youngwoo Ji, Jae-Yoon Sim:
A 490-pW SAR Temperature Sensor With a Leakage-Based Bandgap-Vth Reference. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1549-1553 (2020) - [j76]Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
Low-Power Small-Area Inverter-Based DSM for MEMS Microphone. IEEE Trans. Circuits Syst. 67-II(11): 2392-2396 (2020) - [j75]Cheolmin Ahn, Jaehyeong Hong, Jongshin Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss. IEEE Trans. Circuits Syst. 67-II(12): 2863-2867 (2020) - [j74]Jaeyoung Seo, Jaehyun Ko, Kyunghyun Lim, Sooeun Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8-Gb/s 2.9-pJ/b Single-Ended Receiver With 20-Tap DFE for Highly Reflective Channels. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 818-822 (2020) - [c49]Kyongsu Lee, Jae-Yoon Sim:
High-speed transceiver network for in-vehicle communication system. ISOCC 2020: 264-265
2010 – 2019
- 2019
- [j73]Kyongsu Lee, Jae-Yoon Sim:
A 2.5Gbps Transceiver and Channel Architecture for High-Speed Automotive Communication System. IEICE Trans. Electron. 102-C(10): 766-769 (2019) - [j72]Minseob Lee, Shinwoong Kim, Hong-June Park, Jae-Yoon Sim:
A 0.0043-mm2 0.3-1.2-V Frequency-Scalable Synthesized Fractional-N Digital PLL With a Speculative Dual-Referenced Interpolating TDC. IEEE J. Solid State Circuits 54(1): 99-108 (2019) - [j71]Hong-June Park, Jae-Yoon Sim, Robert Chen-Hao Chang:
Introduction to the Special Section on the 2018 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits 54(10): 2635-2636 (2019) - [j70]Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 192-pW Voltage Reference Generating Bandgap- $V_{\text{th}}$ With Process and Temperature Dependence Compensation. IEEE J. Solid State Circuits 54(12): 3281-3291 (2019) - [j69]Hyunwoo Son, Hwasuk Cho, Jungho Lee, Seongun Bae, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Multilayer-Learning Current-Mode Neuromorphic System With Analog-Error Compensation. IEEE Trans. Biomed. Circuits Syst. 13(5): 986-998 (2019) - [j68]Jahyun Koo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(8): 3077-3088 (2019) - [c48]Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect. ISSCC 2019: 308-310 - [c47]Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Su-Kyoung Kim, Sei Kwang Hahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna. VLSI Circuits 2019: 294- - 2018
- [j67]Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface. IEEE J. Solid State Circuits 53(1): 144-154 (2018) - [j66]Seungnam Choi, Hwan-Seok Ku, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications. IEEE J. Solid State Circuits 53(2): 404-417 (2018) - [j65]Minsoo Choi, Sooeun Lee, Myungguk Lee, Ji-Hoon Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching. IEEE J. Solid State Circuits 53(6): 1780-1792 (2018) - [j64]Hwasuk Cho, Hyunwoo Son, Kihwan Seong, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An On-Chip Learning Neuromorphic Autoencoder With Current-Mode Transposable Memory Read and Virtual Lookup Table. IEEE Trans. Biomed. Circuits Syst. 12(1): 161-170 (2018) - [j63]Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Study on Bandgap Reference Circuit With Leakage-Based PTAT Generation. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2310-2321 (2018) - [j62]Kwangmin Kim, Seokjoon Kang, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Search Algorithm for the Worst Operation Scenario of a Cross-Point Phase-Change Memory Utilizing Particle Swarm Optimization. IEEE Trans. Very Large Scale Integr. Syst. 26(12): 2591-2598 (2018) - [c46]Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 9.3 nW all-in-one bandgap voltage and current reference circuit using leakage-based PTAT generation and DIBL characteristic. ASP-DAC 2018: 309-310 - [c45]Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 16.6-pJ/b 150-Mb/s body-channel communication transceiver with decision feedback equalization improving >200x area efficiency. ASP-DAC 2018: 311-312 - [c44]Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A low-power wide dynamic-range current readout circuit for biosensors. ASP-DAC 2018: 325-326 - [c43]Minseob Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC. ISSCC 2018: 122-124 - [c42]Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jaehyun Ko, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8Gb/s/pin 1.96pJ/b compact single-ended TRX and CDR with phase-difference modulation for highly reflective memory interfaces. ISSCC 2018: 272-274 - 2017
- [j61]Yoon-Jee Kim, Sung-Eun Cho, Ji-Yong Um, Min-Kyun Chae, Jihoon Bang, Jongkeun Song, Taeho Jeon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation. IEEE Trans. Biomed. Circuits Syst. 11(1): 87-97 (2017) - [j60]Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Low-Power Wide Dynamic-Range Current Readout Circuit for Ion-Sensitive FET Sensors. IEEE Trans. Biomed. Circuits Syst. 11(3): 523-533 (2017) - [j59]Seunghwan Hong, Shinwoong Kim, Seungnam Choi, Hwasuk Cho, Jaehyeong Hong, Young Hun Seo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 250-µW 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 106-110 (2017) - [j58]Young-Ho Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Phase-Interpolator-Based Fractional Counter for All-Digital Fractional-N Phase-Locked Loop. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 249-253 (2017) - [j57]Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1706-1717 (2017) - [j56]Jaeyoung Seo, Minsoo Choi, Sanquan Song, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1067-1071 (2017) - [j55]Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 788-792 (2017) - [j54]Yelim Youn, Kwangmin Kim, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
Investigation on the Worst Read Scenario of a ReRAM Crossbar Array. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2402-2410 (2017) - [c41]Myungguk Lee, Seungho Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 10-GHz multi-purpose reconfigurable built-in self-test circuit for high-speed links. A-SSCC 2017: 73-76 - [c40]Jahyun Koo, Kyoung-Sik Moon, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop. ISSCC 2017: 94-95 - [c39]Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit. ISSCC 2017: 100-101 - [c38]Hwasuk Cho, Kihwan Seong, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
8.7 A 0.0047mm2 highly synthesizable TDC- and DCO-less fractional-N PLL with a seamless lock range of fREF to 1GHz. ISSCC 2017: 154-155 - [c37]Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
23.7 A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS. ISSCC 2017: 400-401 - 2016
- [j53]Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC. J. Circuits Syst. Comput. 25(12): 1650155:1-1650155:16 (2016) - [j52]Shinwoong Kim, Seunghwan Hong, Kapseok Chang, Hyungsik Ju, Jaewook Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC. IEEE J. Solid State Circuits 51(2): 391-400 (2016) - [j51]Soo-Min Lee, Ji-Hoon Lim, Il-Min Yi, Young Jae Jang, Hae-Kang Jung, Kyunghoon Kim, Dae-Han Kwon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 51(8): 1890-1901 (2016) - [j50]Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Coefficient-Error-Robust Feed-Forward Equalizing Transmitter for Eye-Variation and Power Improvement. IEEE J. Solid State Circuits 51(8): 1902-1914 (2016) - [j49]Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(1): 122-133 (2016) - [j48]Ji-Hoon Lim, Jun-Hyun Bae, Jaemin Jang, Hae-Kang Jung, Hyunbae Lee, Yongju Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs. IEEE Trans. Circuits Syst. II Express Briefs 63-II(2): 141-145 (2016) - [j47]Seungnam Choi, Hyunwoo Son, Jongshin Shin, Sang-Hyun Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(2): 276-287 (2016) - [j46]Kyongsu Lee, Jae-Yoon Sim:
A 0.8-to-6.5 Gb/s Continuous-Rate Reference-Less Digital CDR With Half-Rate Common-Mode Clock-Embedded Signaling. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(4): 482-493 (2016) - [j45]Yunjae Suh, Seungnam Choi, Jae-Yoon Sim:
A Low-Power Class-AB Gm-Based Amplifier With Application to an 11-bit Pipelined ADC. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2562-2569 (2016) - [c36]Young Jae Jang, Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-power LDO circuit with a fast load regulation. APCCAS 2016: 47-49 - [c35]Young-Ho Choi, Kihwan Seong, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-synthesizable 6Gbps voltage-mode transmitter for serial link. A-SSCC 2016: 245-248 - [c34]Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface. ISOCC 2016: 63-64 - [c33]Il-Min Yi, Seung-Jun Bae, Min-Kyun Chae, Soo-Min Lee, Young Jae Jang, Young-Chul Cho, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-EMI four-bit four-wire single-ended DRAM interface by using a three-level balanced coding scheme. VLSI Circuits 2016: 1-2 - 2015
- [j44]Dong-Woo Jee, Dennis Sylvester, David T. Blaauw, Jae-Yoon Sim:
Digitally Controlled Leakage-Based Oscillator and Fast Relocking MDLL for Ultra Low Power Sensor Platform. IEEE J. Solid State Circuits 50(5): 1263-1274 (2015) - [j43]Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer. IEEE Trans. Biomed. Circuits Syst. 9(1): 138-151 (2015) - [j42]Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(5): 1335-1344 (2015) - [c32]Inhee Lee, Wanyeong Jung, Hyunsoo Ha, Seokhyeon Jeong, Yejoong Kim, Gyouho Kim, Zhiyoong Foo, Jae-Yoon Sim, Dennis Sylvester, David T. Blaauw:
An ultra-low-power biomedical chip for injectable pressure monitor. BioCAS 2015: 1-4 - [c31]Sooeun Lee, Gunbok Lee, Jae-Yoon Sim, Hong-June Park, Wee Sang Park, Byungsub Kim:
A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design. ICCAD 2015: 567-574 - [c30]Jongmi Lee, Youngwoo Ji, Seungnam Choi, Young-Chul Cho, Seong-Jin Jang, Joo-Sun Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.7 A 29nW bandgap reference circuit. ISSCC 2015: 1-3 - 2014
- [j41]Seokhyeon Jeong, Zhiyoong Foo, Yoonmyung Lee, Jae-Yoon Sim, David T. Blaauw, Dennis Sylvester:
A Fully-Integrated 71 nW CMOS Temperature Sensor for Low Power Wireless Sensor Nodes. IEEE J. Solid State Circuits 49(8): 1682-1693 (2014) - [j40]Seung-Hun Lee, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
Current-Mode Transceiver for Silicon Interposer Channel. IEEE J. Solid State Circuits 49(9): 2044-2053 (2014) - [j39]Soo-Min Lee, Il-Min Yi, Hae-Kang Jung, Hyunbae Lee, Yong-Ju Kim, Yunsaing Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 49(11): 2618-2630 (2014) - [j38]Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seung-Hun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array. IEEE Trans. Biomed. Circuits Syst. 8(6): 799-809 (2014) - [j37]Hye-Jung Kwon, Jae-Seung Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 481-485 (2014) - [j36]Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(10): 3034-3043 (2014) - [j35]Hyunsoo Ha, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.5-V, 1.47- µW 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation. IEEE Trans. Circuits Syst. II Express Briefs 61-II(11): 840-844 (2014) - [j34]Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination. IEEE Trans. Circuits Syst. II Express Briefs 61-II(12): 987-991 (2014) - [j33]Kyongsu Lee, Jae-Yoon Sim:
Half-Rate Clock-Embedded Source Synchronous Transceivers in 130-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 22(10): 2093-2102 (2014) - [c29]Inhee Lee, Yejoong Kim, Suyoung Bang, Gyouho Kim, Hyunsoo Ha, Yen-Po Chen, Dongsuk Jeon, Seokhyun Jeong, Wanyeong Jung, Mohammad Hassan Ghaed, Zhiyoong Foo, Yoonmyung Lee, Jae-Yoon Sim, Dennis Sylvester, David T. Blaauw:
Circuit techniques for miniaturized biomedical sensors. CICC 2014: 1-7 - [c28]Yunjae Suh, Seungnam Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A voltage-scalable 10-b pipelined ADC with current-mode amplifier. CICC 2014: 1-4 - [c27]Jae-Seung Lee, Dong-Hee Yeo, Sang-Soo Lee, Hye-Jung Kwon, Jae-Yoon Sim, Byungsub Kim, Hong-June Park:
A 0.4 V driving multi-touch capacitive sensor with the driving signal frequency set to (n+0.5) times the inverse of the LCD VCOM noise period. ISCAS 2014: 682-685 - [c26]Dong Hoon Baek, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
2.6 A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface. ISSCC 2014: 48-49 - [c25]Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology. ISSCC 2014: 50-51 - [c24]Hyunsoo Ha, Dennis Sylvester, David T. Blaauw, Jae-Yoon Sim:
12.6 A 160nW 63.9fJ/conversion-step capacitance-to-digital converter for ultra-low-power wireless sensor nodes. ISSCC 2014: 220-221 - [c23]Ji-Yong Um, Eun-Woo Song, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seunghun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
24.8 An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area. ISSCC 2014: 426-427 - 2013
- [j32]Jun-Seok Kim, Young Hun Seo, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A 300-MS/s, 1.76-ps-Resolution, 10-b Asynchronous Pipelined Time-to-Digital Converter With on-Chip Digital Background Calibration in 0.13-µm CMOS. IEEE J. Solid State Circuits 48(2): 516-526 (2013) - [j31]Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation. IEEE J. Solid State Circuits 48(9): 2118-2127 (2013) - [j30]Dong-Woo Jee, Yunjae Suh, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL. IEEE J. Solid State Circuits 48(11): 2795-2804 (2013) - [j29]Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface. IEEE Trans. Circuits Syst. II Express Briefs 60-II(2): 91-95 (2013) - [j28]Yunjae Suh, Jongmi Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 60-II(3): 142-146 (2013) - [j27]Ji-Yong Um, Yoon-Jee Kim, Eun-Woo Song, Jae-Yoon Sim, Hong-June Park:
A Digital-Domain Calibration of Split-Capacitor DAC for a Differential SAR ADC Without Additional Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(11): 2845-2856 (2013) - [c22]Yen-Po Chen, Yoonmyung Lee, Jae-Yoon Sim, Massimo Alioto, David T. Blaauw, Dennis Sylvester:
45pW ESD clamp circuit for ultra-low power applications. CICC 2013: 1-4 - [c21]Seokhyeon Jeong, Jae-Yoon Sim, David T. Blaauw, Dennis Sylvester:
65nW CMOS temperature sensor for ultra-low power microsystems. CICC 2013: 1-4 - [c20]Dong-Woo Jee, Dennis Sylvester, David T. Blaauw, Jae-Yoon Sim:
A 0.45V 423nW 3.2MHz multiplying DLL with leakage-based oscillator for ultra-low-power sensor platforms. ISSCC 2013: 188-189 - [c19]Seon-Kyoo Lee, Seung-Hun Lee, Dennis Sylvester, David T. Blaauw, Jae-Yoon Sim:
A 95fJ/b current-mode transceiver for 10mm on-chip interconnect. ISSCC 2013: 262-263 - [c18]Soo-Min Lee, Jong-Hoon Kim, Jong-Sam Kim, Yunsaing Kim, Hyunbae Lee, Jae-Yoon Sim, Hong-June Park:
A 27% reduction in transceiver power for single-ended point-to-point DRAM interface with the termination resistance of 4×Z0 at both TX and RX. ISSCC 2013: 308-309 - 2012
- [j26]Woogeun Rhee, Antonio Liscidini, Jae-Yoon Sim, Kenichi Okada, Sudhakar Pamarti:
Clock/Frequency Generation Circuits and Systems. J. Electr. Comput. Eng. 2012: 941653:1-941653:2 (2012) - [j25]Young Hun Seo, Jun-Seok Kim, Hong-June Park, Jae-Yoon Sim:
A 1.25 ps Resolution 8b Cyclic TDC in 0.13 µm CMOS. IEEE J. Solid State Circuits 47(3): 736-743 (2012) - [j24]Dong-Woo Jee, Young Hun Seo, Hong-June Park, Jae-Yoon Sim:
A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping ΔΣ TDC. IEEE J. Solid State Circuits 47(4): 875-883 (2012) - [j23]Hae-Kang Jung, Il-Min Yi, Soo-Min Lee, Jae-Yoon Sim, Hong-June Park:
A Transmitter to Compensate for Crosstalk-Induced Jitter by Subtracting a Rectangular Crosstalk Waveform From Data Signal During the Data Transition Time in Coupled Microstrip Lines. IEEE J. Solid State Circuits 47(9): 2068-2079 (2012) - [j22]Dong-Woo Jee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 1.9-GHz Fractional-N Digital PLL With Subexponent ΔΣ TDC and IIR-Based Noise Cancellation. IEEE Trans. Circuits Syst. II Express Briefs 59-II(11): 721-725 (2012) - [c17]Hyunsoo Ha, Yunjae Suh, Seon-Kyoo Lee, Hong-June Park, Jae-Yoon Sim:
A 0.5V, 11.3-μW, 1-kS/s resistive sensor interface circuit with correlated double sampling. CICC 2012: 1-4 - [c16]Young-Ho Choi, Jae-Yoon Sim, Hong-June Park:
A fractional-N frequency divider for SSCG using a single dual-modulus integer divider and a phase interpolator. ISOCC 2012: 68-71 - [c15]Il-Min Yi, Seung-Jun Bae, Young-Soo Sohn, Jae-Yoon Sim, Hong-June Park:
An on-chip TSV emulation using metal bar surrounded by metal ring to develop interface circuits. ISOCC 2012: 192-195 - [c14]Young-Sik Kim, Seon-Kyoo Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Bae Lee, Joo-Sun Choi, Hong-June Park, Jae-Yoon Sim:
An 8GB/s quad-skew-cancelling parallel transceiver in 90nm CMOS for high-speed DRAM interface. ISSCC 2012: 136-138 - [c13]Seon-Kyoo Lee, Hyunsoo Ha, Hong-June Park, Jae-Yoon Sim:
A 5Gb/s single-ended parallel receiver with adaptive FEXT cancellation. ISSCC 2012: 140-142 - 2011
- [j21]Seon-Kyoo Lee, Young-Sang Kim, Hong-June Park, Jae-Yoon Sim:
A Wide Lock-Range Referenceless CDR with Automatic Frequency Acquisition. J. Electr. Comput. Eng. 2011: 701730:1-701730:7 (2011) - [j20]Young-Sang Kim, Seon-Kyoo Lee, Hong-June Park, Jae-Yoon Sim:
A 110 MHz to 1.4 GHz Locking 40-Phase All-Digital DLL. IEEE J. Solid State Circuits 46(2): 435-444 (2011) - [j19]Seon-Kyoo Lee, Seung-Jin Park, Hong-June Park, Jae-Yoon Sim:
A 21 fJ/Conversion-Step 100 kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low-Power Sensor Interface. IEEE J. Solid State Circuits 46(3): 651-659 (2011) - [j18]Hyung-Joon Chi, Jae-Seung Lee, Seong-Hwan Jeon, Seung-Jun Bae, Young-Soo Sohn, Jae-Yoon Sim, Hong-June Park:
A Single-Loop SS-LMS Algorithm With Single-Ended Integrating DFE Receiver for Multi-Drop DRAM Interface. IEEE J. Solid State Circuits 46(9): 2053-2063 (2011) - [j17]Young Hun Seo, Seon-Kyoo Lee, Jae-Yoon Sim:
A 1-GHz Digital PLL With a 3-ps Resolution Floating-Point-Number TDC in a 0.18-μm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 58-II(2): 70-74 (2011) - [j16]Jong-Hoon Kim, Jung-Bum Shin, Jae-Yoon Sim, Hong-June Park:
5-Gb/s Peak Detector Using a Current Comparator and a Three-State Charge Pump. IEEE Trans. Circuits Syst. II Express Briefs 58-II(5): 269-273 (2011) - [j15]Hyung-Joon Chi, Young-Ho Choi, Soo-Min Lee, Jae-Yoon Sim, Hong-June Park, Jong-Jin Lim, Pil-Sung Kang, Bu-Yeol Lee, Jin-Cheol Hong, Hee-Sub Lee:
A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLL. IEEE Trans. Circuits Syst. II Express Briefs 58-II(10): 687-691 (2011) - [c12]Ji-Yong Um, Jae-Hwan Kim, Jae-Yoon Sim, Hong-June Park:
Digital-domain calibration of split-capacitor DAC with no extra calibration DAC for a differential-type SAR ADC. A-SSCC 2011: 77-80 - [c11]Hye-Jung Kwon, Jae-Seung Lee, Jae-Yoon Sim, Hong-June Park:
A high-gain wide-input-range time amplifier with an open-loop architecture and a gain equal to current bias ratio. A-SSCC 2011: 325-328 - [c10]Jae-Hwan Kim, Ji-Yong Um, Jae-Yoon Sim, Hong-June Park:
Time-interleaved sample clock generator for ultrasound beamformer application. ISOCC 2011: 290-293 - [c9]Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A 0.1-fref BW 1GHz fractional-N PLL with FIR-embedded phase-interpolator-based noise filtering. ISSCC 2011: 94-96 - 2010
- [j14]Jun-Hyun Bae, Sang-Hune Park, Jae-Yoon Sim, Hong-June Park:
A Digital Differential Transmitter with Pseudo-LVDS Output Driver and Digital Mismatch Calibration. IEICE Trans. Electron. 93-C(1): 132-135 (2010) - [j13]Jae-Seung Lee, Jae-Yoon Sim, Hong-June Park:
A High-Throughput On-Chip Variation Monitoring Circuit for MOSFET Threshold Voltage Using VCDL and Time-to-Digital Converter. IEICE Trans. Electron. 93-C(8): 1333-1337 (2010) - [j12]Young-Sang Kim, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
An Analysis and Design Methodology of Resistor-Based Phase Error Averaging for Multiphase Generation. IEICE Trans. Electron. 93-C(12): 1662-1669 (2010)