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Osamu Tomisawa
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1990 – 1999
- 1997
- [j6]Yasuhiro Nunomura, Toru Shimizu, Osamu Tomisawa:
M32R/D-integrating DRAM and microprocessor. IEEE Micro 17(6): 40-48 (1997)
1980 – 1989
- 1989
- [j5]Tetsuo Yamasaki, Kenji Shima, Shinji Komori, Hidehiro Takata, Toshiyuki Tamura, Fumiyasu Asai, Takio Ohno, Osamu Tomisawa, Hiroaki Terada:
VLSI implementation of a variable-length pipeline scheme for data-driven processors. IEEE J. Solid State Circuits 24(4): 933-937 (1989) - [j4]Shinji Komori, Hidehiro Takata, Todhixuki Tamura, Fumixsdu Asai, Takio Ohno, Osamu Tomisawa, Tetsuo Yamasaki, Kenji Shima, Hiroaki Nishikawa, Hiroaki Terada:
A 40-MFLOPS 32-bit floating-point processor with elastic pipeline scheme. IEEE J. Solid State Circuits 24(5): 1341-1347 (1989) - 1988
- [j3]Shinji Komori, Hidehiro Takata, Toshiyuki Tamura, Fumiyasu Asai, Takio Ohno, Osamu Tomisawa, Tetsuo Yamasaki, Kenji Shima, Katsuhiko Asada, Hiroaki Terada:
An elastic pipeline mechanism by self-timed circuits. IEEE J. Solid State Circuits 23(1): 111-117 (1988) - [j2]Takeshi Tokuda, Jiro Korematsu, Yukihiko Shimazu, Narumi Sakashita, Tohru Kengaku, Toshiki Fugiyama, Takio Ohno, Osamu Tomisawa:
A macrocell approach for VLSI processor design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(12): 1272-1277 (1988) - 1984
- [j1]Takeshi Tokuda, Jiro Korematsu, Osamu Tomisawa, Sotoju Asai, Isao Ohkura, Tatsuya Enomoto:
A Hierarchical Standard Cell Approach for Custom VLSI Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 3(3): 172-177 (1984)
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