Zero-aware asymmetric SRAM cell for reducing cache power in writing zero.

Thu, 01 Jan 2004 00:00:00 +0100

Yen-Jen Chang, Feipei Lai, Chia-Lin Yang :
Zero-aware asymmetric SRAM cell for reducing cache power in writing zero. IEEE Trans. Very Large Scale Integr. Syst. 12(8): 827-836 (2004)