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Paul R. Stephan

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affiliation: University of California, Berkeley, CA, USA

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1990 – 1999

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1996
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Paul R. Stephan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Combinational test generation using satisfiability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(9): 1167-1176 (1996)
1994
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Cho W. Moon, Paul R. Stephan, Robert K. Brayton:
Specification, synthesis, and verification of hazard-free asynchronous circuits. J. VLSI Signal Process. 7(1-2): 85-100 (1994)
1993
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Paul R. Stephan, Robert K. Brayton:
Physically Realizable Gate Models. ICCD 1993: 442-445
1991
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Patrick C. McGeer, Alexander Saldanha, Paul R. Stephan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Timing Analysis and Delay-Fault Test Generation using Path-Recursive Functions. ICCAD 1991: 180-183
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Cho W. Moon, Paul R. Stephan, Robert K. Brayton:
Synthesis of Hazard-Free Asynchronous Circuits from Graphical Specifications. ICCAD 1991: 322-325

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