Fast Unified Floorplan Topology Generation and Sizing on Heterogeneous FPGAs.

Thu, 01 Jan 2009 00:00:00 +0100

Pritha Banerjee , Susmita Sur-Kolay, Arijit Bishnu:
Fast Unified Floorplan Topology Generation and Sizing on Heterogeneous FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(5): 651-661 (2009)