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Wei-Xiang Tung

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Conference and Workshop Papers

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2010
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Chi-Chang Lu, Wei-Xiang Tung:
A 1.5V 12-b 40 MSamples/s CMOS pipelined ADC. ISCAS 2010: 4045-4048
2008
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Chi-Chang Lu, Wei-Xiang Tung, Chien-Kuo Huang:
A CMOS low-voltage fully differential sample-and-hold circuit. APCCAS 2008: 1188-1191

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