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ORCIDQing Zhu 0014
Person information
- affiliation: Intel Corporation, Santa Clara, CA, USA
- affiliation (former): University of California Santa Cruz, Computer Engineering Board of Studies, CA, USA
Other persons with the same name
- Qing Zhu — disambiguation page
- Qing Zhu 0001
![[0000-0001-8950-3541]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0001-8950-3541")
— East China Normal University, State Key Laboratory of Estuarine and Coastal Research, Shanghai, China - Qing Zhu 0002 — Jiangsu University, School of Computer Science and Communication Engineering, Zhenjiang, China
- Qing Zhu 0003 — Hunan University, National Engineering Research Center of RVC, College of Electric and Information Engineering, Changsha, China (and 1 more)
- Qing Zhu 0004 — Beijing University of Technology, College of Computer Science, China (and 1 more)
- Qing Zhu 0005 — Shangdong University, Qilu Hospital, Department of Cardiology, Jinan, China
- Qing Zhu 0006 — Chinese Academy of Sciences, Nanjing Institute of Geography and Limnology, Key Laboratory of Watershed Geographic Sciences, China
- Qing Zhu 0007 — Shaanxi Normal University, International Business School, Xi'an, China (and 2 more)
- Qing Zhu 0008 — Ant Group, Shanghai, China
- Qing Zhu 0009 — Southeast University, Department of Automatic Control, Nanjing, China (and 3 more)
- Qing Zhu 0010 — Renmin University of China, School of Information, DEKE Lab, Beijing, China
- Qing Zhu 0011 — University of California Berkeley, Lawrence Berkeley National Laboratory, CA, USA
- Qing Zhu 0012 — Southwest Jiaotong University, Faculty of Geosciences and Engineering, Chengdu, China (and 2 more)
- Qing Zhu 0013 — Xidian University, School of Advanced Materials and Nanotechnology, State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology, Xi'an, China
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1990 – 1999
- 1998
[j3]Mehrdad Parsa, Qing Zhu, J. J. Garcia-Luna-Aceves:
An iterative algorithm for delay-constrained minimum-cost multicasting. IEEE/ACM Trans. Netw. 6(4): 461-474 (1998)- 1996
- [j2]Qing Zhu, Wayne Wei-Ming Dai:
High-speed clock network sizing optimization based on distributed RC and lossy RLC interconnect models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(9): 1106-1118 (1996) - [j1]Qing Zhu, Wayne Wei-Ming Dai:
Planar clock routing for high performance chip and package co-design. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 210-226 (1996) - 1995
- [c3]Qing Zhu, Mehrdad Parsa, J. J. Garcia-Luna-Aceves:
A Source-Based Algorithm for Delay-Constrained Minimum-Cost Multicasting. INFOCOM 1995: 377-385 - 1993
- [c2]Qing Zhu, Wayne Wei-Ming Dai, Joe G. Xi:
Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models. ICCAD 1993: 628-633 - 1992
- [c1]Qing Zhu, Wayne Wei-Ming Dai:
Perfect-balance planar clock routing with minimal path-length. ICCAD 1992: 473-476
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