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Journal Articles
- 1993
[j4]Ping Yang, Jue-Hsien Chern:
Design for reliability: the major challenge for VLSI. Proc. IEEE 81(5): 730-744 (1993)- [j3]Kartikeya Mayaram, Jue-Hsien Chern, Ping Yang:
Algorithms for transient three-dimensional mixed-level circuit and device simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(11): 1726-1733 (1993) - 1989
- [j2]Jue-Hsien Chern, John T. Maeda, Lawrence A. Arledge Jr., Ping Yang:
SIERRA: a 3-D device simulator for reliability modeling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(5): 516-527 (1989) - 1987
- [j1]K. C.-K. Weng, Ping Yang, Jue-Hsien Chern:
A Predictor/CAD Model for Buried-Channel MOS Transistors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(1): 4-16 (1987)
Conference and Workshop Papers
- 2006
- [c7]Shekhar Borkar, Robert W. Brodersen, Jue-Hsien Chern, Eric Naviasky, D. Saias, Charles G. Sodini:
Tomorrow's analog: just dead or just different? DAC 2006: 709-710 - 2005
- [c6]Jue-Hsien Chern:
Challenges of analog/mixed-signal SoC design and verification. ISPD 2005: 102 - 1993
- [c5]Mi-Chang Chang, Jue-Hsien Chern, Ping Yang:
An accurate grid local truncation error for device simulation. ICCAD 1993: 275-282 - [c4]Mi-Chang Chang, Jue-Hsien Chern, Ping Yang:
Efficient and Robust Path Tracing Algorithm for DC Convergence Problem. ISCAS 1993: 1635-1638 - 1991
- [c3]Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern:
Transient Three-Dimensional Mixed-Level Circuit and Device Simulation: Algorithms and Applications. ICCAD 1991: 112-115 - 1990
- [c2]Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern, Richard Burch, Lawrence A. Arledge Jr., Paul F. Cox:
A Parallel Block-Diagonal Preconditioned Conjugate-Gradient Solution Algorithm for Circuit and Device Simulations. ICCAD 1990: 446-449 - 1989
- [c1]Richard Burch, Kartikeya Mayaram, Jue-Hsien Chern, Ping Yang, Paul F. Cox:
PGS and PLUCGS-two new matrix solution techniques for general circuit simulation. ICCAD 1989: 408-411
Coauthor Index
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