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Kyu-Chan Lee

Kyuchan Lee

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This is just a disambiguation page, and is not intended to be the bibliography of an actual person. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.

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2010 – 2019

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2014
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Gab-Su Seo, Jongwon Shin, Bo-Hyung Cho, Kyu-Chan Lee:
Digitally Controlled Current Sensorless Photovoltaic Micro-Converter for DC Distribution. IEEE Trans. Ind. Informatics 10(1): 117-126 (2014)

2000 – 2009

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2007
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Chang-Gyun Kim, Kyu-Chan Lee, Bo-Hyung Cho:
Analysis of Current Distribution in Driving Multiple Cold Cathode Fluorescent Lamps (CCFL). IEEE Trans. Ind. Electron. 54(1): 365-373 (2007)
2006
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Kyu-Chan Lee, Yeong Ho Lee, Kil Jong Lee, Yung-Deug Son:
GPS/INS for Logistics of Ship-Block. ITSC 2006: 777-782
2005
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Sung-Jin Choi, Kyu-Chan Lee, Bo-Hyung Cho:
Design of fluorescent lamp ballast with PFC using a power piezoelectric transformer. IEEE Trans. Ind. Electron. 52(6): 1573-1581 (2005)
2003
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Jae-Yoon Sim, Hongil Yoon, Ki-Chul Chun, Hyun-Seok Lee, Sang-Pyo Hong, Kyu-Chan Lee, Jei-Hwan Yoo, Dong-Il Seo, Soo-In Cho:
A 1.8-V 128-Mb mobile DRAM with double boosting pump, hybrid current sense amplifier, and dual-referenced adjustment scheme for temperature sensor. IEEE J. Solid State Circuits 38(4): 631-640 (2003)

1990 – 1999

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1999
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Jong-Woo Park, Yun-Gi Kim, Il-Kwon Kim, Kyu-Charn Park, Kyu-Chan Lee, Tae-Sung Jung:
Performance characteristics of SOI DRAM for low-power application. IEEE J. Solid State Circuits 34(11): 1446-1453 (1999)
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Hongil Yoon, Gi-Won Cha, Changsik Yoo, Nam-Jong Kim, Keum-Yong Kim, Chang Ho Lee, Kyu-Nam Lim, Kyuchan Lee, Jun-Young Jeon, Tae Sung Jung, Hongsik Jeong, Tae-Young Chung, Kinam Kim, Soo-In Cho:
A 2.5-V, 333-Mb/s/pin, 1-Gbit, double-data-rate synchronous DRAM. IEEE J. Solid State Circuits 34(11): 1589-1599 (1999)
1998
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Kyu-Chan Lee, Changhyun Kim, Hongil Yoon, Keum-Yong Kim, Byung-Sik Moon, Sang-Bo Lee, Jung-Hwa Lee, Nam-Jong Kim, Soo-In Cho:
A 1 Gbit synchronous dynamic random access memory with an independent subarray-controlled scheme and a hierarchical decoding scheme. IEEE J. Solid State Circuits 33(5): 779-786 (1998)
1997
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Kyu-Chan Lee, Changhyun Kim, Dong-Ryul Ryu, Jai-Hoon Sim, Sang-Bo Lee, Byung-Sik Moon, Keum-Yong Kim, Nam-Jong Kim, Seung-Moon Yoo, Hongil Yoon, Jei-Hwan Yoo, Soo-In Cho:
Low-voltage, high-speed circuit designs for gigabit DRAMs. IEEE J. Solid State Circuits 32(5): 642-648 (1997)
1996
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Jei-Hwan Yoo, Chang-Hyun Kim, Kyu-Chan Lee, Kye-Hyun Kyung, Seung-Moon Yoo, Jung-Hwa Lee, Moon-Hae Son, Jin-Man Han, Bok-Moon Kang, Ejaz Haq, Sang-Bo Lee, Jai-Hoon Sim, Joung-Ho Kim, Byung-Sik Moon, Keum-Yong Kim, Jae-Gwan Park, Kyu-Phil Lee, Kang-Yoon Lee, Ki-Nam Kim, Soo-In Cho, Jong-Woo Park, Hyung-Kyu Lim:
A 32-bank 1 Gb self-strobing synchronous DRAM with 1 GByte/s bandwidth. IEEE J. Solid State Circuits 31(11): 1635-1644 (1996)
1994
[j1]
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Kyu-Bock Cho, Kyu-Chan Lee:
An adaptive fuzzy current controller with neural network for a field-oriented controller induction machine. Int. J. Approx. Reason. 10(1): 45-61 (1994)

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