default search action

combined dblp search
author search
venue search
publication search

ask others

D. V. Poornaiah

> Home > Persons

Person information

Refine list

refinements active!

zoomed in on ?? of ?? records

view refined list in

export refined list as

showing all ?? records

1990 – 1999

see FAQ

What is the meaning of the colors in the publication lists?

1996
[c3]
- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/PoornaiahM96
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/PoornaiahM96
D. V. Poornaiah, P. V. Ananda Mohan:
A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications. VLSI Design 1996: 69-72
1995
[c2]
- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/PoornaiahM95
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/PoornaiahM95
D. V. Poornaiah, P. V. Ananda Mohan:
Design of a 3-bit Booth recoded novel VLSI concurrent multiplier-accumulator architecture. VLSI Design 1995: 392-397
1993
[c1]
- view
  authority control:
- export record
  dblp key:
  - conf/icassp/PoornaiahHA93
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icassp/PoornaiahHA93
D. V. Poornaiah, R. Haribabu, M. Omair Ahmad:
Design and VLSI implementation of a novel concurrent 16-bit multiplier-accumulator for DSP applications. ICASSP (1) 1993: 385-388

Coauthor Index

see FAQ

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.