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Zhi-Ting Lin
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2020 – today
- 2024
- [j51]Yue Zhao, Yunlong Liu, Jian Zheng, Zhongzhen Tong, Xin Wang, Runru Yu, Xiulong Wu, Yongliang Zhou, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin:
Configurable in-memory computing architecture based on dual-port SRAM. Microelectron. J. 147: 106163 (2024) - [j50]Zhiting Lin, Changxin Yue, Ke Li, Qiushi Feng, Siyan Li, Yue Zhao, Yuanyang Wang, Jiaqi Chen, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Chenghu Dai, Licai Hao, Xiulong Wu:
Cross-coupled 4T2R multi-logic in-memory computing circuit design. Microelectron. J. 147: 106179 (2024) - [j49]Shiyu Zhao, Qiang Zhao, Licai Hao, Chunyu Peng, Yaling Wang, Wenjuan Lu, Zhiting Lin, Xiulong Wu:
Design of polarity hardening SRAM for mitigating single event multiple node upsets. Microelectron. J. 149: 106214 (2024) - [j48]Zhiting Lin, Runru Yu, Da Huo, Qingchuan Zhu, Miao Long, Yongqi Qin, Yanchun Liu, Lintao Chen, Simin Wang, Ting Wang, Yousheng Xing, Zeshi Wen, Yu Liu, Xin Li, Chenghu Dai, Qiang Zhao, Chunyu Peng, Xiulong Wu:
A 28-nm 9T SRAM-based CIM macro with capacitance weighting module and redundant array-assisted ADC. Microelectron. J. 153: 106397 (2024) - [j47]Zhongzhen Tong, Yilin Xu, Yunlong Liu, Xinrui Duan, Hao Tang, Suteng Zhao, Chenghang Li, Zhiting Lin, Xiulong Wu, Zhaohao Wang, Xiaoyang Lin:
A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 606-619 (2024) - [j46]Jin Zhang, Zhongzhen Tong, Hao Wang, Xin Wang, Qiang Zhao, Jian Zhou, Jiaqun Wang, Zhiting Lin, Xiulong Wu:
A Computing In-Memory Multibit Multiplication Based on Decoupling and In-Array Storing. IEEE Trans. Circuits Syst. I Regul. Pap. 71(8): 3658-3671 (2024) - [j45]Li Liu, Dele Tai, Bin Qiang, Lijun Guan, Chunyu Peng, Chenghu Dai, Licai Hao, Wenjuan Lu, Zhiting Lin, Qiang Zhao, Xiulong Wu:
Flip Point Offset-Compensation Sense Amplifier With Sensing-Margin-Enhancement for Dynamic Random-Access Memory. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 1759-1763 (2024) - [j44]Licai Hao, Xinyi Zhang, Chenghu Dai, Qiang Zhao, Wenjuan Lu, Chunyu Peng, Yongliang Zhou, Zhiting Lin, Xiulong Wu:
Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch Based on Polarity Design and Source-Isolation Technologies. IEEE Trans. Very Large Scale Integr. Syst. 32(4): 597-608 (2024) - [j43]Licai Hao, Yaling Wang, Yunlong Liu, Shiyu Zhao, Xinyi Zhang, Yang Li, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Yongliang Zhou, Chenghu Dai, Zhiting Lin, Xiulong Wu:
Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design. IEEE Trans. Very Large Scale Integr. Syst. 32(5): 883-896 (2024) - [c8]Zhiting Lin, Yunlong Liu, Yaling Wang, Yue Zhao, Chunyu Peng, Xiulong Wu:
SRAM-Based Digital CIM Macro for Linear Interpolation and MAC. ISCAS 2024: 1-5 - 2023
- [j42]Licai Hao, Bin Qiang, Chenghu Dai, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Li Liu, Qiang Zhao, Xiulong Wu, Fei Sun:
Radiation-hardened 14T SRAM cell by polar design for space applications. IEICE Electron. Express 20(13): 20230083 (2023) - [j41]Qiang Zhao, Hanwen Dong, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Junning Chen, Xiulong Wu:
Write-enhanced and radiation-hardened SRAM for multi-node upset tolerance in space-radiation environments. Int. J. Circuit Theory Appl. 51(1): 398-409 (2023) - [j40]Zhiting Lin, Zhongzhen Tong, Fangming Wang, Jin Zhang, Yue Zhao, Peng Sun, Tian Xu, Cheng Zhang, Xingwei Li, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Junning Chen:
In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations. IEEE J. Solid State Circuits 58(5): 1472-1486 (2023) - [j39]Licai Hao, Li Liu, Qi Shi, Bin Qiang, Zhengya Li, Nianlong Liu, Chenghu Dai, Qiang Zhao, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Xiulong Wu:
Design of radiation-hardened memory cell by polar design for space applications. Microelectron. J. 132: 105691 (2023) - [j38]Chenghu Dai, Yuanyuan Du, Qi Shi, Ruixuan Wang, Hao Zheng, Wenjuan Lu, Chunyu Peng, Licai Hao, Zhiting Lin, Xiulong Wu:
Bit-line leakage current tracking and self-compensation circuit for SRAM reliability design. Microelectron. J. 132: 105699 (2023) - [j37]Pengfei Li, Xiuying Wang, Yin Zhang, Haoyu Wang, Jianjie Lu, Qiang Zhao, Licai Hao, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Xiulong Wu:
Novel radiation-hardened-by-design (RHBD) 14T memory cell for aerospace applications in 65 nm CMOS technology. Microelectron. J. 141: 105954 (2023) - [j36]Zhiting Lin, Min Chen, Peng Sun, Xiulong Wu, Qiang Zhao, Wenjuan Lu, Chunyu Peng:
High Restore Yield NVSRAM Structures With Dual Complementary RRAM Devices for High-Speed Applications. IEEE Trans. Very Large Scale Integr. Syst. 31(4): 522-531 (2023) - [j35]Zhiting Lin, Shaoying Zhang, Qian Jin, Jianping Xia, Yunwei Liu, Kefeng Yu, Jian Zheng, Xiaoming Xu, Xing Fan, Ke Li, Zhongzhen Tong, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao:
A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store. IEEE Trans. Very Large Scale Integr. Syst. 31(6): 776-788 (2023) - [j34]Zhongzhen Tong, Yue Zhao, Jin Zhang, Zhiting Lin, Xiaoyang Lin, Xiulong Wu:
In-Memory Transposable Multibit Multiplication Based on Diagonal Symmetry Weight Block. IEEE Trans. Very Large Scale Integr. Syst. 31(9): 1454-1458 (2023) - 2022
- [j33]Yue Zhao, Jinkai Wang, Zhongzhen Tong, Xiulong Wu, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin:
An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset. Microelectron. J. 128: 105578 (2022) - [j32]Jin Zhang, Zhiting Lin, Xiulong Wu, Zhongzhen Tong, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Hongbiao Wu, Junning Chen:
In-Memory Multibit Multiplication Based on Bitline Shifting. IEEE Trans. Circuits Syst. II Express Briefs 69(2): 354-358 (2022) - [j31]Pei Huang, Kuan-Chang Chang, Junlin Ge, Chunyu Peng, Xiulong Wu, Junning Chen, Zhiting Lin:
Offset-Compensation High-Performance Sense Amplifier for Low-Voltage DRAM Based on Current Mirror and Switching Point. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2011-2015 (2022) - [j30]Yue Zhao, Zhiting Lin, Xiulong Wu, Qiang Zhao, Wenjuan Lu, Chunyu Peng, Zhongzhen Tong, Junning Chen:
Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing. IEEE Trans. Very Large Scale Integr. Syst. 30(5): 566-578 (2022) - 2021
- [j29]Zhiting Lin, Honglan Zhan, Zhongwei Chen, Chunyu Peng, Xiulong Wu, Wenjuan Lu, Qiang Zhao, Xuan Li, Junning Chen:
Cascade Current Mirror to Improve Linearity and Consistency in SRAM In-Memory Computing. IEEE J. Solid State Circuits 56(8): 2550-2562 (2021) - [j28]Zhiting Lin, Zhiyong Zhu, Honglan Zhan, Chunyu Peng, Xiulong Wu, Yuan Yao, Jianchao Niu, Junning Chen:
Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical Decoupled Read Ports. IEEE J. Solid State Circuits 56(9): 2832-2844 (2021) - [j27]Chunyu Peng, Zhou Yang, Zhiting Lin, Xiulong Wu, Xuan Li:
Reverse Bias Current Eliminated, Read-Separated, and Write-Enhanced Tunnel FET SRAM. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 466-470 (2021) - [j26]Zhiting Lin, Luanyun Li, Xiulong Wu, Chunyu Peng, Wenjuan Lu, Qiang Zhao:
Half-Select Disturb-Free 10T Tunnel FET SRAM Cell With Improved Noise Margin and Low Power Consumption. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2628-2632 (2021) - 2020
- [j25]Wenjuan Lu, Guoying Qin, Zhiting Lin, Xiulong Wu, Chunyu Peng:
A new reading mode based on balanced pre-charging and group decoding. IEICE Electron. Express 17(24): 20200360 (2020) - [j24]Zhiting Lin, Panpan Chen, Le Ye, Xu Yan, Lanzhi Dong, Shuguang Zhang, Zhou Yang, Chunyu Peng, Xiulong Wu, Junning Chen:
Challenges and Solutions of the TFET Circuit Design. IEEE Trans. Circuits Syst. 67-I(12): 4918-4931 (2020) - [j23]Zhiting Lin, Yong Wang, Chunyu Peng, Xiulong Wu, Xuan Li, Junning Chen:
Multiple Sharing 7T1R Nonvolatile SRAM With an Improved Read/Write Margin and Reliable Restore Yield. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 607-619 (2020) - [j22]Qiang Zhao, Chunyu Peng, Junning Chen, Zhiting Lin, Xiulong Wu:
Novel Write-Enhanced and Highly Reliable RHPD-12T SRAM Cells for Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 848-852 (2020) - [j21]Zhiting Lin, Honglan Zhan, Xuan Li, Chunyu Peng, Wenjuan Lu, Xiulong Wu, Junning Chen:
In-Memory Computing With Double Word Lines and Three Read Ports for Four Operands. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1316-1320 (2020) - [c7]Zhe Yuan, Yixiong Yang, Jinshan Yue, Ruoyang Liu, Xiaoyu Feng, Zhiting Lin, Xiulong Wu, Xueqing Li, Huazhong Yang, Yongpan Liu:
14.2 A 65nm 24.7µJ/Frame 12.3mW Activation-Similarity-Aware Convolutional Neural Network Video Processor Using Hybrid Precision, Inter-Frame Data Reuse and Mixed-Bit-Width Difference-Frame Data Codec. ISSCC 2020: 232-234
2010 – 2019
- 2019
- [j20]Zhiting Lin, Pengfei Wang:
A review of data sets of short-range wireless networks. Comput. Commun. 147: 138-158 (2019) - [j19]Lei Zhang, Shangshang Yang, Xinpeng Wu, Fan Cheng, Ying Xie, Zhiting Lin:
An indexed set representation based multi-objective evolutionary approach for mining diversified top-k high utility patterns. Eng. Appl. Artif. Intell. 77: 9-20 (2019) - [j18]Changyong Liu, Zhiting Lin, Xiulong Wu, Chunyu Peng, Qiang Zhao, Xuan Li, Junning Chen, Xuan Zeng, Xiangdong Hu:
An inverter chain with parallel output nodes for eliminating single-event transient pulse. IEICE Electron. Express 16(4): 20181118 (2019) - [j17]Changyong Liu, Nianlong Liu, Zhiting Lin, Xiulong Wu, Chunyu Peng, Qiang Zhao, Xuan Li, Junning Chen, Xuan Zeng, Xiangdong Hu:
A single event upset tolerant latch with parallel nodes. IEICE Electron. Express 16(11): 20190208 (2019) - [j16]Chunyu Peng, Jiati Huang, Changyong Liu, Qiang Zhao, Songsong Xiao, Xiulong Wu, Zhiting Lin, Junning Chen, Xuan Zeng:
Radiation-Hardened 14T SRAM Bitcell With Speed and Power Optimized for Space Application. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 407-415 (2019) - 2018
- [j15]Chunyu Peng, Lingyu Kong, Xiulong Wu, Zhiting Lin, Hua Xu, Junning Chen, Xuan Zeng:
Offset voltage suppressed sense amplifier with self-adaptive distribution transformation technique. IEICE Electron. Express 15(10): 20180332 (2018) - [j14]Jingfeng Liu, Quan Li, Xin Liu, Zhiqiang Li, Yu Liu, Zhiting Lin, Xiulong Wu:
Picowatt 0.5 V supply with 3 ppm/°C CMOS voltage reference for energy harvesting system. IEICE Electron. Express 15(11): 20180372 (2018) - [j13]Changyong Liu, Chunyu Peng, Zhiting Lin, Xiulong Wu, Ziyang Chen, Qiang Zhao, Xuan Li, Junning Chen, Xuan Zeng, Xiangdong Hu:
A dual-output hardening design of inverter chain for P-hit single-event transient pulse elimination. IEICE Electron. Express 15(15): 20180604 (2018) - [j12]Zhiting Lin, Liang Dong:
Clarifying Trust in Social Internet of Things. IEEE Trans. Knowl. Data Eng. 30(2): 234-248 (2018) - [j11]Chunyu Peng, Songsong Xiao, Wenjuan Lu, Jingbo Zhang, Xiulong Wu, Junning Chen, Zhiting Lin:
Average 7T1R Nonvolatile SRAM With R/W Margin Enhanced for Low-Power Application. IEEE Trans. Very Large Scale Integr. Syst. 26(3): 584-588 (2018) - [c6]Zhiting Lin, Liang Dong:
Clarifying Trust in Social Internet of Things (Extended Abstract). ICDE 2018: 1825-1826 - 2017
- [j10]Chunyu Peng, Ziyang Chen, Jingbo Zhang, Songsong Xiao, Changyong Liu, Xiulong Wu, Zhiting Lin:
A radiation harden enhanced Quatro (RHEQ) SRAM cell. IEICE Electron. Express 14(18): 20170784 (2017) - [j9]Zhiting Lin, Xiulong Wu, Zhi Li, Lijun Guan, Chunyu Peng, Changyong Liu, Junning Chen:
A Pipeline Replica Bitline Technique for Suppressing Timing Variation of SRAM Sense Amplifiers in a 28-nm CMOS Process. IEEE J. Solid State Circuits 52(3): 669-677 (2017) - [i1]Zhiting Lin, Liang Dong:
Clarifying Trust in Social Internet of Things. CoRR abs/1704.03554 (2017) - 2016
- [j8]Chunyu Peng, Xiangwen An, Zhiting Lin, Xiulong Wu, Wei Hong:
Additive-calibration scheme for leakage compensation of low voltage SRAM. IEICE Electron. Express 13(18): 20160720 (2016) - [j7]Zhiting Lin, Xiufang Jiang:
Inter-node relationships in short-range mobile social networks. Int. J. Ad Hoc Ubiquitous Comput. 22(2): 96-105 (2016) - [c5]Chu-Chun Chang, Zhi-Ting Lin, Wai-Wan Koc, Chin Chou, Szu-Hao Huang:
Affinity Propagation Clustering for Intelligent Portfolio Diversification and Investment Risk Reduction. CCBD 2016: 145-150 - 2015
- [j6]Zhiting Lin, Xiulong Wu:
Analyzing and modeling mobility for infrastructure-less communication. J. Netw. Comput. Appl. 53: 156-163 (2015) - [c4]Zhiting Lin, Chunyu Peng, Xiulong Wu, Xiufang Jiang:
Human dynamics in mobile social networks: A study of inter-node relationships. FSKD 2015: 806-810 - 2013
- [j5]Zhiting Lin, Xiufang Jiang:
Universal scheme improving probabilistic routing in delay-tolerant networks. Comput. Commun. 36(8): 849-860 (2013) - [j4]Xiulong Wu, Minghua Li, Zhiting Lin, Mengyuan Xi, Junning Chen:
The Design of High Performance, Low Power Triple-Track Magnetic Sensor Chip. Sensors 13(7): 8771-8785 (2013) - 2010
- [j3]Zhi-Ting Lin, Jie Zheng, Yusheng Ji, Baohua Zhao, Yugui Qu, Xudong Huang, Xiufang Jiang:
EMMNet: Sensor Networking for Electricity Meter Monitoring. Sensors 10(7): 6307-6323 (2010)
2000 – 2009
- 2009
- [j2]Zhi-Ting Lin, Yugui Qu, Xiaofang Zhou, Baohua Zhao:
Analysis and design of mobile Wireless Social Model. Comput. Commun. 32(5): 927-934 (2009) - [j1]Rong gang Bai, Yusheng Ji, Zhi-Ting Lin, Qing-Hua Wang, Xiaofang Zhou, Yugui Qu, Baohua Zhao:
Cross-Layer Protocol Combining Tree Routing and TDMA Slotting in Wireless Sensor Networks. IEICE Trans. Inf. Syst. 92-D(10): 1905-1914 (2009) - 2008
- [c3]Zhi-Ting Lin, Yugui Qu, Qing-Hua Wang, Baohua Zhao:
E-Scheme in Delay-Tolerant Networks. APNOMS 2008: 1-10 - [c2]Qing-Hua Wang, Yugui Qu, Zhi-Ting Lin, Baohua Zhao:
An Energy-Efficiency Route Protocol for MIMO-Based Wireless Sensor Networks. APNOMS 2008: 449-453 - 2006
- [c1]Zhi-Ting Lin, Yugui Qu, Li Jing, Baohua Zhao:
Compromised Nodes in Wireless Sensor Network. APWeb Workshops 2006: 224-230
Coauthor Index
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last updated on 2024-09-21 23:40 CEST by the dblp team
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