default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDPui-In Mak
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2025
[j210]Chaowei Yang, Yong Chen
, Kai Cheng, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak:
Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal-oxide-semiconductor. Int. J. Circuit Theory Appl. 53(3): 1253-1291 (2025)- [j209]Haochen Zhang, Wei-Han Yu, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory- Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell. IEEE J. Solid State Circuits 60(1): 321-331 (2025) - [j208]Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM. IEEE J. Solid State Circuits 60(3): 1103-1112 (2025) - [j207]Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.5-V 6.14- μW Trimming-Free Single-XO Dual-Output Frequency Reference With [5.1-nJ, 120- μs] XO Start-Up and [8.1-nJ, 200- μs] Successive-Approximation-Based RTC Calibration. IEEE J. Solid State Circuits 60(4): 1437-1448 (2025) - [j206]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A Miniature Multinuclei NMR/MRI Platform With a High-Voltage SOI ASIC. IEEE J. Solid State Circuits 60(6): 2013-2024 (2025) - [j205]Jixuan Li, Ke Li, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak:
An 800-MHz 8.17-TOPS/W 0.63-TOPS/mm2 Memory-Utilization-Aware CNN Accelerator Featuring a Memory Stationary Dataflow. IEEE J. Solid State Circuits 60(8): 3033-3042 (2025) - [j204]Yue Wu, Yatao Peng, Andrea Ruffino, Jad Benserhir, Jun Yin, Rui Paulo Martins, Pui-In Mak, Edoardo Charbon:
A Cryo-CMOS Wideband Mode-Switching Class-F VCO With Harmonic-Resonance Self-Alignment. IEEE J. Solid State Circuits 60(10): 3859-3875 (2025) - [j203]Zhizhan Yang, Haochen Zhang, Jun Yin, Rui Paulo Martins, Pui-In Mak:
An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up Identification. IEEE Trans. Circuits Syst. I Regul. Pap. 72(3): 1165-1177 (2025) - [j202]Chen Deng, Sai Wu, Chengcheng Liu, Yatao Peng, Man-Kay Law, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A Systematic Review of Voltage Reference Circuits: Spanning Room Temperature to Cryogenic Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 72(4): 1533-1546 (2025) - [j201]Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
GSLP-CIM: A 28-nm Globally Systolic and Locally Parallel CNN/Transformer Accelerator With Scalable and Reconfigurable eDRAM Compute-in-Memory Macro for Flexible Dataflow. IEEE Trans. Circuits Syst. I Regul. Pap. 72(4): 1657-1667 (2025) - [j200]Jingrun Song, Xinyu Yang, Jiaxu Liu, Yueduo Liu, Zihao Zhu, Zhengxuan Han, Zehao Zhang, Jiaxin Liu, Hongshuai Zhang, Jun Yin, Pui-In Mak, Shiheng Yang:
Analyses Concerning the Phase Noise and Nonlinear Behavior of the Charge-Sharing Integrator-Based Hybrid PLL. IEEE Trans. Circuits Syst. I Regul. Pap. 72(7): 3149-3162 (2025) - [j199]Jixuan Li, Ke Li, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak:
A 97.8 GOPS/W FPGA-Based Residual-Block-Aware CNN Accelerator Featuring Multi-Clock PW2 Pipeline and Adaptive-Resolution Quantization. IEEE Trans. Circuits Syst. I Regul. Pap. 72(8): 4031-4039 (2025) - [j198]Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Rui Paulo Martins, Pui-In Mak, Quan Pan:
Design and Analysis of a Type-II Sampling PLL With Automatic Frequency and Phase Calibrations Achieving 0.62-μs Locking Time. IEEE Trans. Circuits Syst. I Regul. Pap. 72(9): 4584-4596 (2025) - [j197]Xiangxun Zhan, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A Series-LC-Assisted Oscillator Achieving -140.2 dBc/Hz Phase Noise and 187.5 dBc/Hz FoM at 10 MHz Offset From 10.7 GHz. IEEE Trans. Circuits Syst. II Express Briefs 72(2): 389-393 (2025) - [j196]Tailong Xu, Haoran Li, Xi Meng, Xiangxun Zhan, Yatao Peng, Jun Yin, Shiheng Yang, Chao Fan, Zhixiang Huang, Rui Paulo Martins, Pui-In Mak:
Analysis and Design of a Type-II Reference-Sampling PLL Using Gain-Boosting Phase Detector With Sampling Capacitor Reduction. IEEE Trans. Circuits Syst. II Express Briefs 72(3): 439-443 (2025) - [j195]Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.35-0.5-V 0.0136-mm² 12 -MHz Digital Frequency-Locked Loop With 1.06%/V Line Sensitivity in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 72(3): 459-463 (2025) - [j194]Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A Single-XO Dual-Output Frequency Reference Featuring Adaptive RTC Calibration Achieving 0.63 ppm/°C Temperature Coefficient From -40 °C to 125 °C. IEEE Trans. Circuits Syst. II Express Briefs 72(5): 688-692 (2025) - [j193]Ya Zhao, Lingao Huang, Runchen Wang, Jun Yin, Pui-In Mak, Li Geng, Chao Fan:
A 0.0019-mm² LC-Ring Oscillator With an Ultra-Compact Transformer Achieving 175.2 dBc/Hz FoM@1MHz and 202.4 dBc/Hz FoMA. IEEE Trans. Circuits Syst. II Express Briefs 72(5): 693-697 (2025) - [j192]Fei Tan, Yujia Wang, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 28-nm MFCC-Free Keyword Switchable Keyword Spotting (KWS) System With Transferred Training Algorithm. IEEE Trans. Circuits Syst. II Express Briefs 72(5): 803-807 (2025) - [j191]Tan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Chee-Cheow Lim, Rui Paulo Martins, Pui-In Mak, Yong Chen:
A Capacitorless Flipped-Voltage-Follower-Based Low-Dropout Regulator Incorporating Adaptive-Compensation Buffer. IEEE Trans. Very Large Scale Integr. Syst. 33(5): 1422-1426 (2025) - [c152]Hangxiao Ma, Qiaobo Ma, Xuchu Mu, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
A 30-110V Resonant Buck-Boost Power-Bus Charger Achieving 50-A Peak Laser-Current Pulse Generation in 2ns for MHz-Frequency Automotive LiDAR Transmitter. CICC 2025: 1-3 - [c151]Xiongjie Zhang, Xinman Li, Yang Jiang, Zhangming Zhu, Rui Paulo Martins, Pui-In Mak:
A 98.5% Peak Efficiency 2/3-Phase Buck-or-Boost Converter With VCR-Independent Loss Optimization and Unconditional RHP Zero Elimination Achieving 2.76A/mm2-Current-Density and 6.5µs Recovery. CICC 2025: 1-3 - [c150]Yantong Liu, Fei Tan, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak:
A Keyword-Spotting(KWS) Chip Featuring a Bio-Inspired Neuron Model in 65-nm CMOS. CNIOT 2025: 1-6 - [c149]Chengyu Che, Yao Jiang, Xinfei Guo, Ka-Meng Lei, Rui Martins, Pui-In Mak:
A Linear-Regression-Assisted Trimming Scheme for CMOS Voltage Reference. ISCAS 2025: 1-5 - [c148]Gengzhen Qi, Yunchu Li, Shaolin Liao, Pui-In Mak:
A BW-Extended Multi-Band Receiver with High-Order N-Path Filtering at RF Front-End and BB Achieving 200MHz BW and 36.5dBm OB-IIP3. ISCAS 2025: 1-4 - [c147]Zhizhan Yang, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A 0.6V Digital-intensive Pulse Injection 32-kHz Crystal Oscillator Using Stacked Logic Gates. ISCAS 2025: 1-5 - [c146]Kanghong Yu, Mingrui Wang, Ka-Meng Lei, Rui Martins, Pui-In Mak:
A 0.4V Relaxation Oscillator featuring Double Capacitor-Charging Headroom in CMOS 65nm. ISCAS 2025: 1-5 - [c145]Qi Zhou, Shuhao Fan, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A Chip-based Miniature MRI Platform with Integrated PDMS-PCB Coil Frontend for Microlitre-volume Sample Analysis. ISCAS 2025: 1-5 - [c144]Haoran Li, Jinge Li, Xueying Jiang, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak:
19.7 A 27GHz Fractional-N Sub-Sampling PLL Achieving 57.9fsrms Jitter, -249.7dB FoM, and 1.98µS Locking Time Using Polarity-Reversible SSPD. ISSCC 2025: 1-3 - [c143]Haochen Zhang, Wei-Han Yu, Zhongyu Zhao, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A 94.8nW Battery-Free Intelligent Silicon Platform Enabling Distributed, Adaptive, and Event-Driven Multimodal Sensing at the Edge. ISSCC 2025: 1-3 - [c142]Yueduo Liu, Zihao Zhu, Xinyu Yang, Rongxin Bao, Zehao Zhang, Hongshuai Zhang, Jiaxin Liu, Zheng Wang, Mingkang Zhang, Na Yan, Jun Yin, Pui-In Mak, Shiheng Yang:
A 0.4μW/MHz Reference-Replication-Based RC Oscillator with Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm/°C from -40 to 125°C. ISSCC 2025: 84-86 - [c141]Yiyang Yuan, Bingxin Zhang, Yiming Yang, Yishan Luo, Qirui Chen, Shidong Lv, Hao Wu, Cailian Ma, Ming Li, Jinshan Yue, Xinghua Wang, Guozhong Xing, Pui-In Mak, Xiaoran Li, Feng Zhang:
14.5 A 28nm 192.3TFLOPS/W Accurate/Approximate Dual-Mode-Transpose Digital 6T-SRAM CIM Macro for Floating-Point Edge Training and Inference. ISSCC 2025: 258-260 - [c140]Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
27.5: A 4, 100µm2 Wire-Metal-Based Temperature Sensor with a Fractional-Discharge FLL and a Time-Domain Amplifier with ±0.2°C Inaccuracy (3σ) from -40 to 125°C and 45fJ·K2 Resolution FoM in 28nm CMOS. ISSCC 2025: 478-480 - [c139]Margarida Lourenço, Bingbing Zhao, Junde Li, Marcelino B. Santos, Pui-In Mak, Rui Paulo Martins, Wei-Han Yu, Fábio Passos:
On the Usage of Genetic Algorithms, Reinforcement Learning and Bayesian Optimisation for RF IC Design Automation. SMACD 2025: 1-4 - 2024
- [j190]Abdolraouf Rahmani, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins:
A Fast Startup 38.4-MHz Crystal Oscillator Achieving 99-nJ Startup Energy With Adaptive Chirping. IEEE Access 12: 102202-102211 (2024) - [j189]Kai Cheng, Yong Chen, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak:
A 0.012-mm2 0.244-pJ/bit successive approximation register analog-to-digital converter-based true random number generator for Internet of Things applications in a 65-nm complementary metal-oxide-semiconductor. Int. J. Circuit Theory Appl. 52(12): 6028-6055 (2024) - [j188]Haihua Li, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup Time. IEEE J. Solid State Circuits 59(2): 464-475 (2024) - [j187]Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 0.05-mm2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS. IEEE J. Solid State Circuits 59(2): 626-635 (2024) - [j186]Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Anyang Zhao, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and COUT-Free Operations. IEEE J. Solid State Circuits 59(4): 1078-1092 (2024) - [j185]Moon Hyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore:
A 1024-Channel 268-nW/Pixel 36×36 μm2/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. IEEE J. Solid State Circuits 59(4): 1123-1136 (2024) - [j184]Feiyu Li, Qishen Fang, Jiangchao Wu, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
A 93.4% Peak Efficiency CLOAD-Free Multi-Phase Switched-Capacitor DC-DC Converter Achieving a Fast DVS up to 222.5 mV/ns. IEEE J. Solid State Circuits 59(6): 1747-1758 (2024) - [j183]Xiongjie Zhang, Anyang Zhao, Qiaobo Ma, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization Characteristics. IEEE J. Solid State Circuits 59(9): 2895-2906 (2024) - [j182]Yuzhao Fu, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Minglei Zhang, Rui Paulo Martins, Pui-In Mak:
FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm2 Analog Compute-in-Memory Macro. IEEE J. Solid State Circuits 59(9): 3021-3031 (2024) - [j181]Gengzhen Qi, Haonan Guo, Yunchu Li, Pui-In Mak:
A BW-Extended Fourth-Order Gain-Boosted N-Path Filter Employing a Switched gₘ-C Network. IEEE J. Solid State Circuits 59(10): 3183-3191 (2024) - [j180]Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction. IEEE J. Solid State Circuits 59(10): 3192-3203 (2024) - [j179]Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Rui Paulo Martins, Pui-In Mak:
A ULP Long-Range Active-RF Tag With Automatically Calibrated Antenna-TRX Interface. IEEE J. Solid State Circuits 59(11): 3670-3682 (2024) - [j178]Zixuan Wang, Xin Wang, Ka-Meng Lei, Wenjing Zhang, Yunjin Yin, Tailong Xu, Zhikuang Cai, Yufeng Guo, Pui-In Mak:
A 16-MHz Crystal Oscillator With 17.5- μ s Start-Up Time Under 104-ppm- Δ F Injection Using Automatic Phase-Error Correction. IEEE J. Solid State Circuits 59(11): 3780-3790 (2024) - [j177]Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 28-nm 18.7 TOPS/mm² 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh. IEEE J. Solid State Circuits 59(11): 3866-3876 (2024) - [j176]Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment. IEEE J. Solid State Circuits 59(12): 3952-3965 (2024) - [j175]Haijun Shao, Rui Paulo Martins, Pui-In Mak:
A 167- μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double- Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO. IEEE J. Solid State Circuits 59(12): 3980-3992 (2024) - [j174]Yi Mao, Gengzhen Qi, Pui-In Mak:
Design and Analysis of a Blocker-Tolerant Gain-Boosted N-Path Receiver Using a Bottom-Plate Switched-Capacitor Technique. IEEE Open J. Circuits Syst. 5: 92-101 (2024) - [j173]Qi Zhou, Shuhao Fan, Ka-Meng Lei, Donhee Ham, Rui Paulo Martins, Pui-In Mak:
Miniature Magnetic Resonance Imaging System for in situ Monitoring of Bacterial Growth and Biofilm Formation. IEEE Trans. Biomed. Circuits Syst. 18(5): 990-1000 (2024) - [j172]Changxuan Han, Zhixian Deng, Yiyang Shu, Jun Yin, Pui-In Mak, Xun Luo:
A 5.6-dB Noise Figure, 63-86-GHz Receiver Using a Wideband Noise-Cancelling Low Noise Amplifier With Phase and Amplitude Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. 71(1): 120-132 (2024) - [j171]Yueduo Liu, Zihao Zhu, Rongxin Bao, Jiahui Lin, Jun Yin, Qiang Li, Pui-In Mak, Shiheng Yang:
A Compact Sub-nW/kHz Relaxation Oscillator Using a Negative-Offset Comparator With Chopping and Piecewise Charge-Acceleration in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 515-525 (2024) - [j170]Hao Wu, Yong Chen, Yiyang Yuan, Jinshan Yue, Xiangqu Fu, Qirui Ren, Qing Luo, Pui-In Mak, Xinghua Wang, Feng Zhang:
A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 689-702 (2024) - [j169]Ya Zhao, Chao Fan, Jun Yin, Pui-In Mak, Li Geng:
Analysis and Design of a 21.2-to-25.5-GHz Triple-Coil Transformer-Coupled QVCO. IEEE Trans. Circuits Syst. I Regul. Pap. 71(10): 4538-4549 (2024) - [j168]Yuzhao Fu, Jixuan Li, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins, Pui-In Mak:
CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization. IEEE Trans. Circuits Syst. I Regul. Pap. 71(11): 4996-5004 (2024) - [j167]Guangshu Zhao, Zhiming Xiao, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
One-Cycle-Startup Relaxation Oscillator Using Ratiometric Threshold-Referenced and Self-Synchronized Power Gating Techniques. IEEE Trans. Circuits Syst. II Express Briefs 71(1): 56-60 (2024) - [j166]Tian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Pui-In Mak, Rui Paulo Martins:
Extended Power Dynamic Range and Enhanced Power Conversion Efficiency of a Switched-Capacitor DC-DC Converter: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1606-1612 (2024) - [j165]Xiongjie Zhang, Xinman Li, Anyang Zhao, Yang Jiang, Weihang Zhang, Jincheng Zhang, Rui Paulo Martins, Pui-In Mak:
A 12V-to-1V Outphase-Interleaved SC Hybrid Converter With Enhanced Inductor De-Energizing Slew Rate and Adaptive Deadtime Control. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2579-2583 (2024) - [j164]Ya Zhao, Chao Fan, Yuanxing Peng, Chenglong Liang, Jun Yin, Pui-In Mak, Li Geng:
A 12.9-to-24 GHz Dual-Mode Multi-Coil VCO Achieving 199.2 dBc/Hz Peak FoMT in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2604-2608 (2024) - [j163]Xin Lu, Jiangchao Wu, Zhao Wang, Yifei Xiang, Liyuan Liu, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(8): 3635-3639 (2024) - [j162]Zhizhan Yang, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A Complementary Drain-Grounded VCO-PA Improving Transmit Efficiency Over a Wide EIRP Range. IEEE Trans. Circuits Syst. II Express Briefs 71(10): 4422-4426 (2024) - [j161]Rujian Cao, Zhongyu Zhao, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak:
An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4688-4692 (2024) - [j160]Junde Li, Guoqiang Xin, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 512-nW 0.003-mm² Forward-Forward Closed Box Trainer for an Analog Voice Activity Detector in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4703-4707 (2024) - [j159]Io-Wa Iam, Chio-Kuan Choi, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins:
A Constant-Power and Optimal-Transfer-Efficiency Wireless Inductive Power Transfer Converter for Battery Charger. IEEE Trans. Ind. Electron. 71(1): 450-461 (2024) - [j158]Chongyao Xu, Litao Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling Attacks. IEEE Trans. Inf. Forensics Secur. 19: 3927-3942 (2024) - [c138]Gengzhen Qi, Pui-In Mak:
A 14.7mW Blocker-Tolerant Wideband Receiver Using a Transformer-Based N-Path Passive-LNA and a 2nd-Order TIA Achieving 110MHz RF-BW and 13dBm OB-IIP3. A-SSCC 2024: 1-3 - [c137]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A Miniaturized MRI Scanner Featuring a HighVoltage SOI ASIC for Non-Invasive Object Reconstruction and Flow Analysis. BioCAS 2024: 1-5 - [c136]Huihua Li, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT Augmentation. CICC 2024: 1-2 - [c135]Qiaobo Ma, Huihua Li, Jiahao Shi, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
A Multi-Phase Multi-Path Hybrid Buck Converter for 9-48V to 0.8-1.2V Conversion with Improved DCR-Loss Reduction and Alleviated CFLY Current Gathering Achieving 88.3% Peak Efficiency and 176A/cm3Density. CICC 2024: 1-2 - [c134]Jiangchao Wu, Ke Hu, Xuanlin Chen, Pui-In Mak, Rui Paulo Martins, Man Kay Law:
A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS. CICC 2024: 1-2 - [c133]Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Pui-In Mak, Rui Paulo Martins, Quan Pan:
A 6.0-to-6.9GHz 99fsrms-Jitter Type-II Sampling PLL with Automatic Frequency and Phase Calibration Method Achieving 0.62μs Locking Time in 28nm CMOS. CICC 2024: 1-2 - [c132]Guangshu Zhao, Chao Xie, Chenxi Wang, Yang Jiang, Milin Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from -25 to 85°C. CICC 2024: 1-2 - [c131]Jiyuan Liu, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
Invited Paper: A Multi-Phase Multi-Ratio Resonant Switched-Capacitor DC-DC Converter with Improved Power Density. ICTA 2024: 182-185 - [c130]Zheng Fan, Zhu Li, Renguang Tang, Guanhua Wu, Shanqing Yang, Liang Cheng Tu, Yuan Wang, Pui-In Mak:
Quality Factor Optimization and Thermal Noise Analysis of Silicon MEMS Resonators. IEEE SENSORS 2024: 1-4 - [c129]Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
3.3 A 0.5V 6.14μW Trimming-Free Single-XO Dual-Output Frequency Reference with [5.1nJ, 120μs] XO Startup and [8.1nJ, 200μs] Successive-Approximation-Based RTC Calibration. ISSCC 2024: 58-60 - [c128]Yunbo Huang, Yong Chen, Zunsong Yang, Rui Paulo Martins, Pui-In Mak:
7.4 A 0.027mm2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and -74.2dBc Reference Spur. ISSCC 2024: 130-132 - [c127]Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak:
10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment. ISSCC 2024: 204-206 - [c126]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
17.2 A Miniature Multi-Nuclei NMR/MRI Platform with a High-Voltage SOI ASIC Achieving a 134.4dB Image SNR with a 173×250×103μm3 Resolution. ISSCC 2024: 316-318 - [c125]Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM. ISSCC 2024: 330-332 - [c124]Ya Zhao, Chao Fan, Qiuyu Fang, Guohe Zhang, Jun Yin, Pui-In Mak, Li Geng:
19.4 A 0.07 mm2 20-to-23.8GHz 8-phase Oscillator Incorporating Magnetic + Dual-Injection Coupling Achieving 189.2dBc/Hz FoM@10 MHz and 200.7dBc/Hz FoMA in 65nm CMOS. ISSCC 2024: 354-356 - [c123]Haijun Shao, Rui Paulo Martins, Pui-In Mak:
23.4 A 167 μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive Quadrature-Front-End, a Double-Sided Double-Balanced Cascaded Mixer and a Dual-Transformer-Coupled Class-D VCO. ISSCC 2024: 406-408 - [c122]Qiaobo Ma, Yang Jiang, Huihua Li, Xiongjie Zhang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A Output. ISSCC 2024: 460-462 - [c121]Yiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang:
34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC. ISSCC 2024: 576-578 - [c120]Guoqiang Xin, Fei Tan, Junde Li, Junren Chen, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 5T-SRAM Based Computing-in-Memory Macro Featuring Partial Sum Boosting and Analog Non-Uniform Quantization. MWSCAS 2024: 882-887 - [c119]Tianle Chen, Hongyu Ren, Zunsong Yang, Yunbo Huang, Xianghe Meng, Weiwei Yan, Weidong Zhang, Xuqiang Zheng, Xuan Guo, Tetsuya Iizuka, Pui-In Mak, Yong Chen, Bo Li:
A 6.5-to-6.9-GHz SSPLL with Configurable Differential Dual-Edge SSPD Achieving 44-fs RMS Jitter, -260.7-dB FOMJitter, and -76.5-dBc Reference Spur. VLSI Technology and Circuits 2024: 1-2 - [c118]Xuchu Mu, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
A Fully Integrated 48-V GaN Driver Using Parallel-Multistep-Series Reconfigurable Switched-Capacitor Bank Achieving 7.7nC/mm2 On-Chip Bootstrap Driving Density. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j157]Yi Chen Lee, Harikrishnan Ramiah, Alexander Choo Chia Chun, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins:
High-Performance Multiband Ambient RF Energy Harvesting Front-End System for Sustainable IoT Applications - A Review. IEEE Access 11: 11143-11164 (2023) - [j156]Teck Seong Chang, Harikrishnan Ramiah, Yang Jiang, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins:
Design and Implementation of Hybrid DC-DC Converter: A Review. IEEE Access 11: 30498-30514 (2023) - [j155]Io-Wa Iam, Zhaoyi Ding, Zhicong Huang, Chi-Seng Lam, Rui Paulo Martins, Pui-In Mak:
A Flexible Rooftop Photovoltaic-Inductive Wireless Power Transfer System for Low-Voltage DC Grid. IEEE Access 11: 51117-51132 (2023) - [j154]Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Saad Mekhilef, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Fully-Integrated CMOS Dual-Band RF Energy Harvesting Front-End Employing Adaptive Frequency Selection. IEEE Access 11: 74121-74135 (2023) - [j153]Li Fang Lai, Harikrishnan Ramiah, Tan Yee Chyan, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins:
Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review. IEEE Access 11: 85237-85258 (2023) - [j152]Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Subthreshold Operation Series-Parallel Charge Pump Incorporating Dynamic Source-Fed Oscillator for Wide-Input-Voltage Energy Harvesting Application. IEEE Access 11: 97641-97653 (2023) - [j151]Lin Wang, Yong Chen, Chaowei Yang, Xionghui Zhou, Mei Han, Paolo Stefano Crovetti, Pui-In Mak, Rui Paulo Martins:
A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with deliberate-current-mismatch frequency detection and interpolation-based multiphase clock generation. Int. J. Circuit Theory Appl. 51(5): 1988-2015 (2023) - [j150]Chongyao Xu, Litao Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
Modeling-Attack-Resistant Strong PUF Exploiting Stagewise Obfuscated Interconnections With Improved Reliability. IEEE Internet Things J. 10(18): 16300-16315 (2023) - [j149]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm3 Field of View. IEEE J. Solid State Circuits 58(7): 2028-2039 (2023) - [j148]Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.4-V 0.0294-mm2 Resistor-Based Temperature Sensor Achieving ±0.24 °C p2p Inaccuracy From40 °C to 125 °C and 385 fJ · K2 Resolution FoM in 65-nm CMOS. IEEE J. Solid State Circuits 58(9): 2543-2553 (2023) - [j147]Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak:
A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM. IEEE J. Solid State Circuits 58(11): 3020-3029 (2023) - [j146]Liwen Lin, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
An Ultra-Low-Voltage Single-Crystal Oscillator-Timer (XO-Timer) Delivering 16-MHz and 32.258-kHz Clocks for Sub-0.5-V Energy-Harvesting BLE Radios in 28-nm CMOS. IEEE Open J. Circuits Syst. 4: 126-138 (2023) - [j145]Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui Paulo Martins:
A 3.78-GHz Type-I Sampling PLL With a Fully Passive KPD-Doubled Primary-Secondary S-PD Measuring 39.6-fsRMS Jitter, -260.2-dB FOM, and -70.96-dBc Reference Spur. IEEE Trans. Circuits Syst. I Regul. Pap. 70(4): 1463-1475 (2023) - [j144]Lin Wang, Yong Chen, Chaowei Yang, Xiaoteng Zhao, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A 10.8-to-37.4 Gb/s Reference-Less FD-Less Single-Loop Quarter-Rate Bang-Bang Clock and Data Recovery Employing Deliberate-Current- Mismatch Wide-Frequency-Acquisition Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 70(7): 2637-2650 (2023) - [j143]Xuchu Mu, Guangshu Zhao, Anyang Zhao, Yang Jiang, Man-Kay Law, Makoto Takamiya, Pui-In Mak, Rui Paulo Martins:
Floating-Domain Integrated GaN Driver Techniques for DC-DC Converters: A Review. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3790-3805 (2023) - [j142]Jack Kee Yong, Wen Xun Lian, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Fully Integrated CMOS Tri-Band Ambient RF Energy Harvesting System for IoT Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4705-4718 (2023) - [j141]Xi Meng, Haoran Li, Peng Chen, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5110-5123 (2023) - [j140]Qiaobo Ma, Xiongjie Zhang, Anyang Zhao, Huihua Li, Yang Jiang, Man-Kay Law, Makoto Takamiya, Rui Paulo Martins, Pui-In Mak:
A 10.5 W, 93% Efficient Dual-Path Hybrid (DPH)-Based DC-DC Converter Incorporating a Continuous-Current-Input Switched-Capacitor Stage and Enhanced IL Reduction for 12 V/24 V Inputs. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5482-5495 (2023) - [j139]Zehao Zhang, Shiheng Yang, Yueduo Liu, Zihao Zhu, Jiahui Lin, Rongxin Bao, Tailong Xu, Zhizhan Yang, Mingkang Zhang, Jiaxin Liu, Xiong Zhou, Jun Yin, Pui-In Mak, Qiang Li:
On the DC-Settling Process of the Pierce Crystal Oscillator in Start-Up. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 26-30 (2023) - [j138]Arvind Singh Rawat, Jagadheswaran Rajendran, Selvakumar Mariappan, Narendra Kumar, Pui-In Mak, Rui Paulo Martins:
A 27-dBm, 0.92-GHz CMOS Power Amplifier With Mode Switching and a High-Q Compact Inductor (HQCI) Achieving a 30% Back-Off PAE. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 121-125 (2023) - [j137]Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 281-285 (2023) - [j136]Chao Fan, Ya Zhao, Yanlong Zhang, Jun Yin, Li Geng, Pui-In Mak:
A 3.57-mW 2.88-GHz Multi-Phase Injection-Locked Ring-VCO With a 200-kHz 1/f³ Phase Noise Corner. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 865-869 (2023) - [j135]Yunbo Huang, Yong Chen, Pui-In Mak, Rui Paulo Martins:
Universal Stability Criterion for Type-I Sampling Phase-Locked Loops. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1351-1355 (2023) - [j134]Alexander Choo Chia Chun, Yi Chen Lee, Harikrishnan Ramiah, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A High-PCE Range-Extension CMOS Rectifier Employing Advanced Topology Amalgamation Technique for Ambient RF Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 70(10): 3747-3751 (2023) - [j133]Chengyu Che, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.4-V 8400-μm2 Voltage Reference in 65-nm CMOS Exploiting Well-Proximity Effect. IEEE Trans. Circuits Syst. II Express Briefs 70(10): 3822-3826 (2023) - [j132]Yunbo Huang, Yong Chen, Kaiyuan Yang, Paolo Crovetti, Pui-In Mak, Rui Paulo Martins:
A 28-nm 368-fJ/Cycle, 0.43%/V Supply-Sensitivity, FLL-Based RC Oscillator Featuring Positive-TC-Only Resistors and ΔΣM-Based Trimming. IEEE Trans. Circuits Syst. II Express Briefs 70(11): 3950-3954 (2023) - [j131]Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
Transfer-Path-Based Hardware-Reuse Strong PUF Achieving Modeling Attack Resilience With200 Million Training CRPs. IEEE Trans. Inf. Forensics Secur. 18: 2188-2203 (2023) - [j130]Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui Paulo Martins:
A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fsRMSJitter, -258.7-dB FOM, and -75.17-dBc Reference Spur. IEEE Trans. Very Large Scale Integr. Syst. 31(2): 188-198 (2023) - [j129]Qirui Ren, Qiang Huo, Zhisheng Chen, Qi Gao, Yiming Wang, Yiming Yang, Hao Wu, Xiangqu Fu, Xiaoxin Xu, Qing Luo, Jianfeng Gao, Chengying Chen, Xiaojin Zhao, Dengyun Lei, Xinghua Wang, Feng Zhang, Yong Chen, Pui-In Mak:
A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF. IEEE Trans. Very Large Scale Integr. Syst. 31(2): 243-252 (2023) - [j128]Yuchen Wei, Shiheng Yang, Yueduo Liu, Rongxin Bao, Zihao Zhu, Jiahui Lin, Zehao Zhang, Yong Chen, Jun Yin, Pui-In Mak, Qiang Li:
A 0.0043-mm2 0.085-μW/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC Network. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1248-1252 (2023) - [j127]Alexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins:
A High-Performance Dual-Topology CMOS Rectifier With 19.5-dB Power Dynamic Range for RF-Based Hybrid Energy Harvesting. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1253-1257 (2023) - [j126]Kishore Kumar Pakkirisami Churchill, Harikrishnan Ramiah, Alexander Choo Chia Chun, Gabriel Chong, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Reconfigurable CMOS Stack Rectifier With 22.8-dB Dynamic Range Achieving 47.91% Peak PCE for IoT/WSN Application. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1619-1623 (2023) - [c117]Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
A Cross-Coupled Hybrid SC Converter with Extended VCR Range and Intrinsic Loss Balance Achieving 90% Average Efficiency with 1.5% Variation Over Full Li-ion Battery Input Range and 0.95A/mm2 Peak Current Density. A-SSCC 2023: 1-3 - [c116]Gengzhen Qi, Pui-In Mak:
A 0.5-to-1.5GHz BW-Extended Gain-Boosted N-Path Filter Using a Switched $\mathbf{g}_{\mathbf{m}}-\mathbf{C}$ Network Achieving 50MHz BW and 18.2dBm OB-IIP3. A-SSCC 2023: 1-3 - [c115]Jiangchao Wu, Guangshu Zhao, Litao Zhang, Yu Jia, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man Kay Law:
Fully Integrated Reconfigurable Solar Energy Harvester for $100\mu\mathrm{A}$ Burst Output Current Delivery with 78.6% Peak Energy Extraction Efficiency and Minimum Startup Incident Light Power of 0.27mW/cm2. A-SSCC 2023: 1-3 - [c114]Chao Fan, Ya Zhao, Yanlong Zhang, Jun Yin, Pui-In Mak, Guohe Zhang, Li Geng:
A 13.5-to-28.8GHz 72.3%-Locking Range Multi-Phase Injection-Locked Frequency Tripler with Improved Output Power and Wideband Subharmonic-Spur Rejection in 28nm CMOS. CICC 2023: 1-2 - [c113]Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
Simple-Logic Comparator-Offset Mitigation Technique for Resistor-Based Temperature Sensor in DFLL. ICTA 2023: 1-2 - [c112]Yunbo Huang, Yong Chen, Chaowei Yang, Pui-In Mak, Rui Paulo Martins:
A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2nd-Harmonic Output. ISCAS 2023: 1-5 - [c111]Haihua Li, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8μs Startup Time. ISSCC 2023: 64-65 - [c110]Xiangxun Zhan, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz. ISSCC 2023: 148-149 - [c109]Hao Guo, Yong Chen, Yunbo Huang, Pui-In Mak, Rui Paulo Martins:
An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-Resonance, Multi-Core, and Multi-Mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz $\text{FoM}_{\mathrm{T}}$. ISSCC 2023: 152-153 - [c108]Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN Classifier. ISSCC 2023: 214-215 - [c107]Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Pui-In Mak, Rui Paulo Martins:
A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power. ISSCC 2023: 470-471 - [c106]Moon Hyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore:
A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. VLSI Technology and Circuits 2023: 1-2 - [c105]Xiongjie Zhang, Qiaobo Ma, Anyang Zhao, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 0.05-to-3.1A 585mA/mm3 97.3%-Efficiency Outphase Switched-Capacitor Hybrid Buck Converter with Relieved Capacitor Inrush Current and COUT-Free Operation. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j125]Mikki How-Wen Loo, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins:
Fully-Integrated Timers for Ultra-Low-Power Internet-of-Things Nodes - Fundamentals and Design Techniques. IEEE Access 10: 65936-65950 (2022) - [j124]Tan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins:
Evaluation and Perspective of Analog Low-Dropout Voltage Regulators: A Review. IEEE Access 10: 114469-114489 (2022) - [j123]Tian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins:
Low Voltage Switched-Capacitive-Based Reconfigurable Charge Pumps for Energy Harvesting Systems: An Overview. IEEE Access 10: 126910-126930 (2022) - [j122]Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
A 1.7-3.6 GHz 20 MHz-Bandwidth Channel-Selection N-Path Passive-LNA Using a Switched-Capacitor-Transformer Network Achieving 23.5 dBm OB-IIP₃ and 3.4-4.8 dB NF. IEEE J. Solid State Circuits 57(2): 413-422 (2022) - [j121]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0285-mm2 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS. IEEE J. Solid State Circuits 57(2): 546-561 (2022) - [j120]Xiaoteng Zhao, Yong Chen, Lin Wang, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS. IEEE J. Solid State Circuits 57(5): 1358-1371 (2022) - [j119]Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery. IEEE J. Solid State Circuits 57(10): 2919-2933 (2022) - [j118]Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 108-nW 0.8-mm2 Analog Voice Activity Detector Featuring a Time-Domain CNN With Sparsity-Aware Computation and Sparsified Quantization in 28-nm CMOS. IEEE J. Solid State Circuits 57(11): 3288-3297 (2022) - [j117]Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui Paulo Martins:
A 266-μW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77-dB SFDR and -3-dBm OOB-B-1 dB. IEEE J. Solid State Circuits 57(12): 3669-3680 (2022) - [j116]Kishore Kumar Pakkirisami Churchill, Harikrishnan Ramiah, Gabriel Chong, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Fully-Integrated Ambient RF Energy Harvesting System with 423-μW Output Power. Sensors 22(12): 4415 (2022) - [j115]Peng Chen, Xi Meng, Jun Yin, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski:
A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 51-63 (2022) - [j114]Hao Guo, Yong Chen, Chaowei Yang, Pui-In Mak, Rui Paulo Martins:
A Millimeter-Wave CMOS VCO Featuring a Mode-Ambiguity-Aware Multi-Resonant-RLCM Tank. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 172-185 (2022) - [j113]Peng Chen, Jun Yin, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski:
Mismatch Analysis of DTCs With an Improved BIST-TDC in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 196-206 (2022) - [j112]Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
A Low-Power Multiband Blocker-Tolerant Receiver With a Steep Filtering Slope Using an N-Path LNA With Feedforward OB Blocker Cancellation and Filtering-by-Aliasing Baseband Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 220-231 (2022) - [j111]Jieyun Zhang, Chongyao Xu, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
A 4T/Cell Amplifier-Chain-Based XOR PUF With Strong Machine Learning Attack Resilience. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 366-377 (2022) - [j110]Yueduo Liu, Rongxin Bao, Zihao Zhu, Shiheng Yang, Xiong Zhou, Jun Yin, Pui-In Mak, Qiang Li:
Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop. IEEE Trans. Circuits Syst. I Regul. Pap. 69(2): 495-505 (2022) - [j109]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
Miniaturization of a Nuclear Magnetic Resonance System: Architecture and Design Considerations of Transceiver Integrated Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 69(8): 3049-3060 (2022) - [j108]Tailong Xu, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 6-to-7.5-GHz 54-fsrms Jitter Type-II Reference-Sampling PLL Featuring a Gain-Boosting Phase Detector for In-Band Phase-Noise Reduction. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4774-4786 (2022) - [j107]Man-Kay Law, Yang Jiang, Pui-In Mak, Rui Paulo Martins:
Miniaturized Energy Harvesting Systems Using Switched-Capacitor DC-DC Converters. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2629-2634 (2022) - [j106]Yong Chen, Pui-In Mak, Rui Paulo Martins:
High-Performance Harmonic-Rich Single-Core VCO With Multi-LC Tank: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 69(7): 3115-3121 (2022) - [j105]Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.1-V VIN Subthreshold 3-Stage Dual-Branch Charge Pump With 43.4% Peak Power Conversion Efficiency Using Advanced Dynamic Gate-Bias. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3929-3933 (2022) - [j104]Zunsong Yang, Yong Chen, Jia Yuan, Pui-In Mak, Rui Paulo Martins:
A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 238-242 (2022) - [j103]Alexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins:
A Reconfigurable CMOS Rectifier With 14-dB Power Dynamic Range Achieving >36-dB/mm2 FoM for RF-Based Hybrid Energy Harvesting. IEEE Trans. Very Large Scale Integr. Syst. 30(10): 1533-1537 (2022) - [j102]Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A -20-dBm Sensitivity RF Energy-Harvesting Rectifier Front End Using a Transformer IMN. IEEE Trans. Very Large Scale Integr. Syst. 30(11): 1808-1812 (2022) - [c104]Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
Design and Implementation of a Low Power Switched-Capacitor-Based Analog Feature Extractor for Voice Keyword Spotting. APCCAS 2022: 1-5 - [c103]Yi Mao, Yuyang Du, Yongjun He, Gengzhen Qi, Pui-In Mak:
A 0.5 to 2GHz Blocker-Tolerant Receiver Achieving 29dBm OOB-IIP3 and 3.2 to 6dB NF Using Bottom-Plate Switched-Capacitor Technique. APCCAS 2022: 82-85 - [c102]Yu Lei, Qishen Fang, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
High Linearity BJT-Based Time-Domain CMOS Temperature Sensor. APCCAS 2022: 153-156 - [c101]Huihua Li, Qiaobo Ma, Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Adaptive Line-Transient Enhancement Techniques for Dual-Path Hybrid Converter Achieving Ultra-Low Output Overshoot/Undershoot. APCCAS 2022: 319-323 - [c100]Zhixiang Liu, Shiyou Wei, Gengzhen Qi, Pui-In Mak:
A 32dBm OOB-IIP3 BW-Extended 5G-NR Receiver with 4th-Order Gain-Boosted N-Path LNA. APCCAS 2022: 463-467 - [c99]Lin Wang, Yong Chen, Chaowei Yang, Xiaoteng Zhao, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A 10.8-to-37.4Gb/s Single-Loop Quarter-Rate BBCDR Without External Reference and Separate FD Featuring a Wide-Frequency-Acquisition Scheme. ICECS 2022 2022: 1-4 - [c98]Ruijie Zhao, Xiongjie Zhang, Xuchu Mu, Huihua Li, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A Switched-Capacitor Hybrid Quadratic Buck Converter for 48V-Input Wide-Range Conversion. ICECS 2022 2022: 1-2 - [c97]Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 108nW 0.8mm2 Analog Voice Activity Detector (VAD) Featuring a Time-Domain CNN as a Programmable Feature Extractor and a Sparsity-Aware Computational Scheme in 28nm CMOS. ISSCC 2022: 1-3 - [c96]Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui Paulo Martins:
A 266µW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77dB SFDR and -3dBm OOB-B-1dB. ISSCC 2022: 400-402 - [c95]Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters. MWSCAS 2022: 1-4 - [c94]Xinyi Ge, Yong Chen, Lin Wang, Nan Qi, Pui-In Mak, Rui Paulo Martins:
A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector. NorCAS 2022: 1-7 - [c93]Xiongjie Zhang, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Modelling and Analysis of ΔΣ-Modulation-Based Output Spectrum Spur Reduction in Dual-Path Hybrid DC-DC Converters. PRIME 2022: 269-272 - 2021
- [j101]Lingshan Kong, Yong Chen, Haohong Yu, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins:
Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique. IEEE Access 9: 35814-35823 (2021) - [j100]Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 12V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching. IEICE Electron. Express 18(22): 20210382 (2021) - [j99]Qiaobo Ma, Xiongjie Zhang, Yang Jiang, Katsuhiro Hata, Makoto Takamiya, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A multi-path switched-capacitor-inductor hybrid DC-DC converter with reduced inductor loss and extended voltage conversion range. IEICE Electron. Express 18(22): 20210405 (2021) - [j98]Rui Paulo Martins, Pui-In Mak, Chi-Hang Chan, Jun Yin, Yan Zhu, Yong Chen, Yan Lu, Man-Kay Law, Sai-Weng Sin:
Bird's-eye view of analog and mixed-signal chips for the 21st century. Int. J. Circuit Theory Appl. 49(3): 746-761 (2021) - [j97]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 0.35-V 5, 200-μm2 2.1-MHz Temperature-Resilient Relaxation Oscillator With 667 fJ/Cycle Energy Efficiency Using an Asymmetric Swing-Boosted RC Network and a Dual-Path Comparator. IEEE J. Solid State Circuits 56(9): 2701-2710 (2021) - [j96]Zhaobo Zhang, Chenchang Zhan, Man-Kay Law, Yang Jiang, Pui-In Mak, Rui Paulo Martins:
A High-Efficiency Dual-Antenna RF Energy Harvesting System Using Full-Energy Extraction With Improved Input Power Response. IEEE Open J. Circuits Syst. 2: 436-444 (2021) - [j95]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68(1): 89-102 (2021) - [j94]Zunsong Yang, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.003-mm2 440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2307-2316 (2021) - [j93]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
Startup Time and Energy-Reduction Techniques for Crystal Oscillators in the IoT Era. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 30-35 (2021) - [j92]Selvakumar Mariappan, Jagadheswaran Rajendran, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins:
An 800 MHz-to-3.3 GHz 20-MHz Channel Bandwidth WPD CMOS Power Amplifier For Multiband Uplink Radio Transceivers. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1178-1182 (2021) - [j91]Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Pui-In Mak, Rui Paulo Martins:
A Wide-PCE-Dynamic-Range CMOS Cross-Coupled Differential-Drive Rectifier for Ambient RF Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1743-1747 (2021) - [j90]Yunbo Huang, Yong Chen, Hailong Jiao, Pui-In Mak, Rui Paulo Martins:
A 3.36-GHz Locking-Tuned Type-I Sampling PLL With -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3093-3097 (2021) - [j89]Shiheng Yang, Jun Yin, Tailong Xu, Taimo Yi, Pui-In Mak, Qiang Li, Rui Paulo Martins:
A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3108-3112 (2021) - [j88]Jixuan Li, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3143-3147 (2021) - [j87]Selvakumar Mariappan, Jagadheswaran Rajendran, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-Distorter (DAAPD) Reconfigurable Linearization Technique. IEEE Trans. Circuits Syst. II Express Briefs 68(11): 3381-3385 (2021) - [j86]Jiangchao Wu, Hou-Man Leong, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 29(9): 1665-1669 (2021) - [c92]Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
An Arithmetic Progression Switched-Capacitor DC-DC Converter with Soft VCR Transitions Achieving 93.7% Peak Efficiency and 400 mA Output Current. A-SSCC 2021: 1-3 - [c91]Jixuan Li, Jiabao Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement. A-SSCC 2021: 1-3 - [c90]Xi Meng, Junqi Guo, Haoran Li, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 15.2-to-18.2GHz Balanced Dual-Core Inverse-Class-F VCO with Q-Enhanced 2nd-Harmonic Resonance Achieving 187-to-188.1dBc/Hz FoM in 28nm CMOS. A-SSCC 2021: 1-3 - [c89]Chongyao Xu, Jieyun Zhang, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections With <0.83% Bit-Error Rate. A-SSCC 2021: 1-3 - [c88]Jun Yin, Pui-In Mak, Rui Paulo Martins:
A Periodically Time-Varying Inductor Applied to The Class-D VCO for Phase Noise Improvement. ESSCIRC 2021: 307-310 - [c87]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 0.45-V 3.3-µW Resistor-Based Temperature Sensor Achieving 10mK Resolution in 65-nm CMOS. ICTA 2021: 127-128 - [c86]Yunbo Huang, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 3.52-GHz Harmonic-Rich-Shaping VCO with Noise Suppression and Circulation, Achieving -151-dBc/Hz Phase Noise at 10-MHz Offset. ISCAS 2021: 1-4 - [c85]Hao Guo, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBc/Hz Peak FoM and 90-to-180kHz 1/f3 PN Corner Without Harmonic Tuning. ISSCC 2021: 294-296 - [c84]Wei-Han Yu, Massimo Giordano, Rohan Doshi, Minglei Zhang, Pui-In Mak, Rui Paulo Martins, Boris Murmann:
A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory. MWSCAS 2021: 326-329 - 2020
- [j85]Zunsong Yang, Yong Chen, Shiheng Yang, Pui-In Mak, Rui Paulo Martins:
A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector. IEEE Access 8: 2222-2232 (2020) - [j84]Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, Rui Paulo Martins:
A Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push-Pull LNA. IEEE J. Solid State Circuits 55(8): 2055-2068 (2020) - [j83]Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui Paulo Martins:
Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier With Capacitor Reuse for Input Power Adaptation. IEEE J. Solid State Circuits 55(8): 2106-2117 (2020) - [j82]Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A Multiband FDD SAW-Less Transmitter for 5G-NR Featuring a BW-Extended N-Path Filter-Modulator, a Switched-BB Input, and a Wideband TIA-Based PA Driver. IEEE J. Solid State Circuits 55(12): 3387-3399 (2020) - [j81]Ka-Fai Un, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Anding Zhu, Robert Bogdan Staszewski:
Design Considerations of the Interpolative Digital Transmitter for Quantization Noise and Replicas Rejection. IEEE Trans. Circuits Syst. II Express Briefs 67-II(1): 37-41 (2020) - [j80]Yunbo Huang, Yong Chen, Hao Guo, Pui-In Mak, Rui Paulo Martins:
A 3.3-mW 25.2-to-29.4-GHz Current-Reuse VCO Using a Single-Turn Multi-Tap Inductor and Differential-Only Switched-Capacitor Arrays With a 187.6-dBc/Hz FOM. IEEE Trans. Circuits Syst. 67-I(11): 3704-3717 (2020) - [j79]Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools. IEEE Trans. Circuits Syst. 67-I(11): 3965-3977 (2020) - [j78]Zhicong Huang, Zhijian Fang, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins:
Cost-Effective Compensation Design for Output Customization and Efficiency Optimization in Series/Series-Parallel Inductive Power Transfer Converter. IEEE Trans. Ind. Electron. 67(12): 10356-10365 (2020) - [j77]Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A 3.15-mW +16.0-dBm IIP3 22-dB CG Inductively Source Degenerated Balun-LNA Mixer With Integrated Transformer-Based Gate Inductor and IM2 Injection Technique. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 700-713 (2020) - [j76]Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A 1-V 4-mW Differential-Folded Mixer With Common-Gate Transconductor Using Multiple Feedback Achieving 18.4-dB Conversion Gain, +12.5-dBm IIP3, and 8.5-dB NF. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1164-1174 (2020) - [c83]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/µs Acquisition Speed of PAM-4 data in 28nm CMOS. CICC 2020: 1-4 - [c82]Io-Wa Iam, Iok-U Hoi, Zhicong Huang, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins:
A Unity-Power-Factor Inductive Power Transfer Converter with Inherent CC-to-CV Transition Ability for Automated Guided Vehicle Charging. IECON 2020: 5257-5261 - [c81]Chuanqi Wei, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Low Complexity Illumination-Invariant Motion Vector Detection Based on Logarithmic Edge Detection and Edge Difference. ISCAS 2020: 1-5 - [c80]Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
An N × N Multiplier-Based Multi-Bit Strong PUF using Path Delay Extraction. ISCAS 2020: 1-5 - [c79]Jieyun Zhang, Xiaojin Zhao, Man-Kay Law, Chongyao Xu, Jiahao Liu, Pui-In Mak, Rui Paulo Martins:
A 6.4pJ/Bit Strong Physical Unclonable Function Based on Multiple-Stage Amplifier Chain. ISCAS 2020: 1-5 - [c78]Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui Paulo Martins:
10.1 A 1.4-to-2.7GHz FDD SAW-Less Transmitter for 5G-NR Using a BW-Extended N-Path Filter-Modulator, an Isolated-BB Input and a Wideband TIA-Based PA Driver Achieving <-157.5dBc/Hz OB Noise. ISSCC 2020: 172-174 - [c77]Chao Fan, Jun Yin, Chee-Cheow Lim, Pui-In Mak, Rui Paulo Martins:
17.9 A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3rd-Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIA. ISSCC 2020: 282-284 - [c76]Yong Chen, Pui-In Mak, Chirn Chye Boon, Rui Paulo Martins:
A 0.024-mm2 45.4-GHz-Bandwidth Unity-Gain Output Driver with SDD22<-10dB up to 35 GHz. MWSCAS 2020: 687-690
2010 – 2019
- 2019
- [j75]Zechariah Balan, Harikrishnan Ramiah, Jagadheswaran Rajendran, Nandini Vitee, Pravinah Nair Shasidharan, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy/ZigBee receiver consuming 2 mA. Integr. 66: 112-118 (2019) - [j74]Shiheng Yang, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 0.0056-mm2 -249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs. IEEE J. Solid State Circuits 54(1): 88-98 (2019) - [j73]Shiheng Yang, Jun Yin, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS. IEEE J. Solid State Circuits 54(5): 1351-1362 (2019) - [j72]Yang Jiang, Man-Kay Law, Zhiyuan Chen, Pui-In Mak, Rui Paulo Martins:
Algebraic Series-Parallel-Based Switched-Capacitor DC-DC Boost Converter With Wide Input Voltage Range and Enhanced Power Density. IEEE J. Solid State Circuits 54(11): 3118-3134 (2019) - [j71]Haohong Yu, Yong Chen, Chirn Chye Boon, Chenyang Li, Pui-In Mak, Rui Paulo Martins:
A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB. IEEE Trans. Circuits Syst. II Express Briefs 66-II(1): 71-75 (2019) - [j70]Tongquan Jiang, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 157-161 (2019) - [j69]Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Narendra Kumar, Pui-In Mak, Rui Paulo Martins:
A 5.1-to-7.3 mW, 2.4-to-5 GHz Class-C Mode-Switching Single-Ended-Complementary VCO Achieving >190 dBc/Hz FoM. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 237-241 (2019) - [j68]Iat-Fai Sun, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs. IEEE Trans. Circuits Syst. II Express Briefs 66-II(4): 527-531 (2019) - [j67]Ka-Fai Un, Gengzhen Qi, Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins:
A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-µs Settling Time for Multi-ISM-Band ULP Radios. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3307-3316 (2019) - [j66]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0018-mm2 153% Locking-Range CML-Based Divider-by-2 With Tunable Self-Resonant Frequency Using an Auxiliary Negative-gm Cell. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3330-3339 (2019) - [j65]Jiangchao Wu, Ka-Chon Lei, Hou-Man Leong, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1768-1772 (2019) - [j64]Yong Chen, Pui-In Mak, Zunsong Yang, Chirn Chye Boon, Rui Paulo Martins:
A 0.0071-mm2 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 3991-4004 (2019) - [j63]Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Wei Ru Wong, Pui-In Mak, Rui Paulo Martins:
CMOS Cross-Coupled Differential-Drive Rectifier in Subthreshold Operation for Ambient RF Energy Harvesting - Model and Analysis. IEEE Trans. Circuits Syst. II Express Briefs 66-II(12): 1942-1946 (2019) - [j62]Chao Fan, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(12): 4850-4861 (2019) - [j61]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications. IEEE Trans. Very Large Scale Integr. Syst. 27(1): 69-82 (2019) - [j60]Bing Li, Ji-Ping Na, Wei Wang, Jia Liu, Qian Yang, Pui-In Mak:
A 13-bit 8-kS/s Δ-Σ Readout IC Using ZCB Integrators With an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 843-853 (2019) - [j59]Xinyi Ge, Yong Chen, Xiaoteng Zhao, Pui-In Mak, Rui Paulo Martins:
Analysis and Verification of Jitter in Bang-Bang Clock and Data Recovery Circuit With a Second-Order Loop Filter. IEEE Trans. Very Large Scale Integr. Syst. 27(10): 2223-2236 (2019) - [c75]Lingshan Kong, Yong Chen, Haohong Yu, Quan Pan, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins:
Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique. APCCAS 2019: 153-156 - [c74]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS. APCCAS 2019: 229-232 - [c73]Zunsong Yang, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.003-mm2 440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS. A-SSCC 2019: 283-284 - [c72]Zunsong Yang, Yong Chen, Shiheng Yang, Pui-In Mak, Rui Paulo Martins:
A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur. ISSCC 2019: 270-272 - [c71]Hao Guo, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN Corner. ISSCC 2019: 410-412 - [c70]Zhiyuan Chen, Yang Jiang, Man-Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui Paulo Martins:
A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction Improvement. ISSCC 2019: 424-426 - [c69]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm. SMACD 2019: 37-40 - 2018
- [j58]Changzhi Li, Pui-In Mak, Roberto Gómez-García, Ying Chen:
Guest Editorial Wireless Sensing Circuits and Systems for Healthcare and Biomedical Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(2): 161-164 (2018) - [j57]Changzhi Li, Ka-Fai Un, Pui-In Mak, Ying Chen, José Maria Muñoz-Ferreras, Zhi Yang, Roberto Gómez-García:
Overview of Recent Development on Wireless Sensing Circuits and Systems for Healthcare and Biomedical Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(2): 165-177 (2018) - [j56]Keith A. Bowman, Muhammad M. Khellah, Takashi Kono, Joseph Shor, Pui-In Mak:
Introduction to the January Special Issue on the 2017 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 53(1): 3-7 (2018) - [j55]Gengzhen Qi, Barend van Liempd, Pui-In Mak, Rui Paulo Martins, Jan Craninckx:
A SAW-Less Tunable RF Front End for FDD and IBFD Combining an Electrical-Balance Duplexer and a Switched-LC N-Path LNA. IEEE J. Solid State Circuits 53(5): 1431-1442 (2018) - [j54]Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A 0.18-V 382-µW Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS. IEEE J. Solid State Circuits 53(6): 1618-1627 (2018) - [j53]Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A Regulation-Free Sub-0.5-V 16-/24-MHz Crystal Oscillator With 14.2-nJ Startup Energy and 31.8-µW Steady-State Power. IEEE J. Solid State Circuits 53(9): 2624-2635 (2018) - [j52]Yatao Peng, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor. IEEE J. Solid State Circuits 53(11): 3232-3242 (2018) - [j51]Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters. IEEE J. Solid State Circuits 53(12): 3455-3469 (2018) - [j50]Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins:
An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances. IEEE J. Solid State Circuits 53(12): 3528-3539 (2018) - [j49]Wei-Han Yu, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
A 0.7-2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(1): 14-25 (2018) - [j48]Haidong Yi, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 0.032-mm2 0.15-V Three-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications. IEEE Trans. Circuits Syst. II Express Briefs 65-II(2): 146-150 (2018) - [j47]Xingqiang Peng, Jun Yin, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A Coin-Battery-Powered LDO-Free 2.4-GHz Bluetooth Low-Energy Transmitter With 34.7% Peak System Efficiency. IEEE Trans. Circuits Syst. II Express Briefs 65-II(9): 1174-1178 (2018) - [j46]Chak-Fong Cheang, Pui-In Mak, Rui Paulo Martins:
A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 2889-2902 (2018) - [j45]Yong Chen, Pui-In Mak, Chirn Chye Boon, Rui Paulo Martins:
A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 3014-3026 (2018) - [j44]Lingshan Kong, Yong Chen, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins:
A Wideband Inductorless dB-Linear Automatic Gain Control Amplifier Using a Single-Branch Negative Exponential Generator for Wireline Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3196-3206 (2018) - [c68]Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, Rui Paulo Martins:
A 2.4-GHz Single-Pin Antenna Interface RF Front-End with a Function-Reuse Single-MOS VCO-PA and a Push-Pull LNA. A-SSCC 2018: 293-294 - [c67]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 0.4 V 6.4 μW 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °C for Wearable and Sensing Applications. ISCAS 2018: 1-5 - [c66]Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A regulation-free sub-0.5V 16/24MHz crystal oscillator for energy-harvesting BLE radios with 14.2nJ startup energy and 31.8pW steady-state power. ISSCC 2018: 52-54 - [c65]Shiheng Yang, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 0.0056mm2 all-digital MDLL using edge re-extraction, dual-ring VCOs and a 0.3mW block-sharing frequency tracking loop achieving 292fsrms Jitter and -249dB FOM. ISSCC 2018: 118-120 - [c64]Chee-Cheow Lim, Jun Yin, Pui-In Mak, Harikrishnan Ramiah, Rui Paulo Martins:
An inverse-class-F CMOS VCO with intrinsic-high-Q 1st- and 2nd-harmonic resonances for 1/f2-to-1/f3 phase-noise suppression achieving 196.2dBc/Hz FOM. ISSCC 2018: 374-376 - [c63]Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm2. ISSCC 2018: 422-424 - [c62]Jun Yin, Shiheng Yang, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS. ISSCC 2018: 450-452 - [c61]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications. SMACD 2018: 129-132 - 2017
- [j43]Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins:
A Handheld High-Sensitivity Micro-NMR CMOS Platform With B-Field Stabilization for Multi-Type Biological/Chemical Assays. IEEE J. Solid State Circuits 52(1): 284-297 (2017) - [j42]Xingqiang Peng, Jun Yin, Pui-In Mak, Wei-Han Yu, Rui Paulo Martins:
A 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) Pout. IEEE J. Solid State Circuits 52(6): 1495-1508 (2017) - [j41]Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
A 0.038-mm2 SAW-Less Multiband Transceiver Using an N-Path SC Gain Loop. IEEE J. Solid State Circuits 52(8): 2055-2070 (2017) - [j40]Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins:
Fully Integrated Inductor-Less Flipping-Capacitor Rectifier for Piezoelectric Energy Harvesting. IEEE J. Solid State Circuits 52(12): 3168-3180 (2017) - [j39]Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A Single-Chip Solar Energy Harvesting IC Using Integrated Photodiodes for Biomedical Implant Applications. IEEE Trans. Biomed. Circuits Syst. 11(1): 44-53 (2017) - [j38]Chang-Hao Chen, Elizabeth A. McCullagh, Sio-Hang Pun, Peng Un Mak, Mang I Vai, Pui-In Mak, Achim Klug, Tim C. Lei:
An Integrated Circuit for Simultaneous Extracellular Electrophysiology Recording and Optogenetic Neural Manipulation. IEEE Trans. Biomed. Eng. 64(3): 557-568 (2017) - [j37]Amin Khalili Moghaddam, Joon Huang Chuah, Harikrishnan Ramiah, Jalil Ahmadian, Pui-In Mak, Rui Paulo Martins:
A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(4): 992-1002 (2017) - [j36]Wei-Han Yu, Xingqiang Peng, Pui-In Mak, Rui Paulo Martins:
A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(11): 2844-2857 (2017) - [j35]Chio-In Ieong, Mingzhong Li, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins:
A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1307-1319 (2017) - [c60]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 0.4V 4.8μW 16MHz CMOS crystal oscillator achieving 74-fold startup-time reduction using momentary detuning. ISCAS 2017: 1-4 - [c59]Dapeng Sun, Man-Kay Law, Bo Wang, Pui-In Mak, Rui Paulo Martins:
Piecewise BJT process spread compensation exploiting base recombination current. ISCAS 2017: 1-4 - [c58]Antoine Dupret, Pui-In Mak, Eugenio Cantatore:
Session 21 overview: Smart SoCs for innovative applications. ISSCC 2017: 350-351 - [c57]Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins:
22.2 A 1.7mm2 inductorless fully integrated flipping-capacitor rectifier (FCR) for piezoelectric energy harvesting with 483% power-extraction enhancement. ISSCC 2017: 372-373 - [c56]Wei-Han Yu, Haidong Yi, Pui-In Mak, Jun Yin, Rui Paulo Martins:
24.4 A 0.18V 382µW bluetooth low-energy (BLE) receiver with 1.33nW sleep power for energy-harvesting applications in 28nm CMOS. ISSCC 2017: 414-415 - 2016
- [j34]Jimmy C. F. Ngai, Pui-In Mak, Shirley W. I. Siu:
ProtPOS: a python package for the prediction of protein preferred orientation on a surface. Bioinform. 32(16): 2537-2538 (2016) - [j33]Suyan Fan, Man-Kay Law, Mingzhong Li, Zhiyuan Chen, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins:
Wide Input Range Supply Voltage Tolerant Capacitive Sensor Readout Using On-Chip Solar Cell. J. Circuits Syst. Comput. 25(1): 1640006:1-1640006:21 (2016) - [j32]Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A µNMR CMOS Transceiver Using a Butterfly-Coil Input for Integration With a Digital Microfluidic Device Inside a Portable Magnet. IEEE J. Solid State Circuits 51(10): 2274-2286 (2016) - [j31]Jun Yin, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A Time-Interleaved Ring-VCO with Reduced 1/f3 Phase Noise Corner, Extended Tuning Range and Inherent Divided Output. IEEE J. Solid State Circuits 51(12): 2979-2991 (2016) - [j30]Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 2-µW 45-nV/√Hz Readout Front End With Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop. IEEE Trans. Circuits Syst. II Express Briefs 63-II(4): 351-355 (2016) - [c55]Chak-Fong Cheang, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
Time-domain I/Q-LOFT compensator using a simple envelope detector for a sub-GHz IEEE 802.11af WLAN transmitter. ASP-DAC 2016: 3-4 - [c54]Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins:
Sub-threshold VLSI logic family exploiting unbalanced pull-up/down network, logical effort and inverse-narrow-width techniques. ASP-DAC 2016: 15-16 - [c53]Chio-In Ieong, Pui-In Mak, Mang I Vai, Rui Paulo Martins:
Sub-µW QRS detection processor using quadratic spline wavelet transform and maxima modulus pair recognition for power-efficient wireless arrhythmia monitoring. ASP-DAC 2016: 21-22 - [c52]Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A high-Q spiral inductor with dual-layer patterned floating shield in a class-B VCO achieving a 190.5-dBc/Hz FoM. ISCAS 2016: 2759-2762 - [c51]Jun Yin, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
2.7 A 0.003mm2 1.7-to-3.5GHz dual-mode time-interleaved ring-VCO achieving 90-to-150kHz 1/f3 phase-noise corner. ISSCC 2016: 48-49 - [c50]Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
26.9 A 0.038mm2 SAW-less multiband transceiver using an N-Path SC gain loop. ISSCC 2016: 452-454 - [c49]Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins:
28.1 A handheld 50pM-sensitivity micro-NMR CMOS platform with B-field stabilization for multi-type biological/chemical assays. ISSCC 2016: 474-475 - 2015
- [j29]Md. Tawfiq Amin, Pui-In Mak, Rui Paulo Martins:
A 3.6-mW 6-GHz current-reuse VCO-buffer with improved load drivability in 65-nm CMOS. Int. J. Circuit Theory Appl. 43(1): 133-138 (2015) - [j28]Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti:
A 0.02 mm2 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad. IEEE J. Solid State Circuits 50(9): 1988-2001 (2015) - [j27]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti:
Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate. IEEE J. Solid State Circuits 50(10): 2353-2366 (2015) - [j26]P. V. Ananda Mohan, Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti:
Corrections to "A 0.02 mm2 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad". IEEE J. Solid State Circuits 50(10): 2464 (2015) - [j25]Zushu Yan, Wei Wang, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A 0.0045-mm2 32.4-µW Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation. IEEE Trans. Circuits Syst. II Express Briefs 62-II(3): 246-250 (2015) - [j24]Chak-Fong Cheang, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A Combinatorial Impairment-Compensation Digital Predistorter for a Sub-GHz IEEE 802.11af-WLAN CMOS Transmitter Covering a 10x-Wide RF Bandwidth. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(4): 1025-1032 (2015) - [j23]Yong Chen, Pui-In Mak, Yan Wang:
A Highly-Scalable Analog Equalizer Using a Tunable and Current-Reusable for 10-Gb/s I/O Links. IEEE Trans. Very Large Scale Integr. Syst. 23(5): 978-982 (2015) - [j22]Yaohua Zhao, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Improving the Linearity and Power Efficiency of Active Switched-Capacitor Filters in a Compact Die Area. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3104-3108 (2015) - [j21]Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins:
Energy Optimized Subthreshold VLSI Logic Family With Unbalanced Pull-Up/Down Network and Inverse Narrow-Width Techniques. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3119-3123 (2015) - [c48]Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A μNMR CMOS transceiver using a butterfly-coil input for integration with a digital microfluidic device inside a portable magnet. A-SSCC 2015: 1-4 - [c47]Jimmy C. F. Ngai, Pui-In Mak, Shirley W. I. Siu:
Predicting favorable protein docking poses on a solid surface by particle swarm optimization. CEC 2015: 2745-2752 - [c46]Limin Yang, Wenya Nan, Xiaoting Qu, Feng Wan, Pui-In Mak, Peng Un Mak, Mang I Vai, Yong Hu, Agostinho C. Rosa:
Beta/theta ratio neurofeedback training effects on the spectral topography of EEG. EMBC 2015: 4741-4744 - [c45]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
2.4 A 0.028mm2 11mW single-mixing blocker-tolerant receiver with double-RF N-path filtering, S11 centering, +13dBm OB-IIP3 and 1.5-to-2.9dB NF. ISSCC 2015: 1-3 - 2014
- [j20]Pui-In Mak, Miao Liu, Yaohua Zhao, Rui Paulo Martins:
Enhancing the performances of recycling folded cascode OpAmp in nanoscale CMOS through voltage supply doubling and design for reliability. Int. J. Circuit Theory Appl. 42(6): 605-619 (2014) - [j19]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
A 2.4 GHz ZigBee Receiver Exploiting an RF-to-BB-Current-Reuse Blixer + Hybrid Filter Topology in 65 nm CMOS. IEEE J. Solid State Circuits 49(6): 1333-1344 (2014) - [j18]Fujian Lin, Pui-In Mak, Rui Paulo Martins:
An RF-to-BB-Current-Reuse Wideband Receiver With Parallel N-Path Active/Passive Mixers and a Single-MOS Pole-Zero LPF. IEEE J. Solid State Circuits 49(11): 2547-2559 (2014) - [j17]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
A Sub-GHz Multi-ISM-Band ZigBee Receiver Using Function-Reuse and Gain-Boosted N-Path Techniques for IoT Applications. IEEE J. Solid State Circuits 49(12): 2990-3004 (2014) - [j16]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(9): 2560-2568 (2014) - [c44]Shiheng Yang, Pui-In Mak, Rui Paulo Martins:
A 104μW EMI-resisting bandgap voltage reference achieving -20dB PSRR, and 5% DC shift under a 4dBm EMI level. APCCAS 2014: 57-60 - [c43]Diyang Zhao, Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Design considerations of a low-noise receiver front-end and its spiral coil for portable NMR screening. APCCAS 2014: 403-406 - [c42]Wei Wang, Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Micropower two-stage amplifier employing recycling current-buffer Miller compensation. ISCAS 2014: 1889-1892 - [c41]Suyan Fan, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 0.3-V, 37.5-nW 1.5∼6.5-pF-input-range supply voltage tolerant capacitive sensor readout. ISIC 2014: 388-391 - [c40]Fujian Lin, Pui-In Mak, Rui Paulo Martins:
3.9 An RF-to-BB current-reuse wideband receiver with parallel N-path active/passive mixers and a single-MOS pole-zero LPF. ISSCC 2014: 74-75 - [c39]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
9.4 A 0.5V 1.15mW 0.2mm2 Sub-GHz ZigBee receiver supporting 433/860/915/960MHz ISM bands with zero external components. ISSCC 2014: 164-165 - [c38]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti:
17.2 A 0.0013mm2 3.6μW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin. ISSCC 2014: 288-289 - [c37]Ze Wang, Chiman Wong, Janir Nuno da Cruz, Feng Wan, Pui-In Mak, Peng Un Mak, Mang I Vai:
Muscle and electrode motion artifacts reduction in ECG using adaptive Fourier decomposition. SMC 2014: 1456-1461 - 2013
- [j15]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A 0.016-mm2 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With > 0.95-MHz GBW. IEEE J. Solid State Circuits 48(2): 527-540 (2013) - [j14]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Correction to "A 0.016 mm2 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With >0.95-MHz GBW". IEEE J. Solid State Circuits 48(6): 1539 (2013) - [j13]Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
A 53-to-75-mW, 59.3-dB HRR, TV-Band White-Space Transmitter Using a Low-Frequency Reference LO in 65-nm CMOS. IEEE J. Solid State Circuits 48(9): 2078-2089 (2013) - [j12]Tan-Tan Zhang, Pui-In Mak, Mang I Vai, Peng Un Mak, Man-Kay Law, Sio-Hang Pun, Feng Wan, Rui Paulo Martins:
15-nW Biopotential LPFs in 0.35-µm CMOS Using Subthreshold-Source-Follower Biquads With and Without Gain Compensation. IEEE Trans. Biomed. Circuits Syst. 7(5): 690-702 (2013) - [j11]Yong Chen, Pui-In Mak, Li Zhang, He Qian, Yan Wang:
A Fifth-Order 20-MHz Transistorized-LC-Ladder LPF With 58.2-dB SFDR, 68-µW/Pole/MHz Efficiency, and 0.13-mm2 Die Size in 90-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 60-II(1): 11-15 (2013) - [j10]Wei-Han Yu, Chak-Fong Cheang, Pui-In Mak, Weng-Fai Cheng, Ka-Fai Un, U-Wai Lok, Rui Paulo Martins:
A Nonrecursive Digital Calibration Technique for Joint Elimination of Transmitter and Receiver I/Q Imbalances With Minimized Add-On Hardware. IEEE Trans. Circuits Syst. II Express Briefs 60-II(8): 462-466 (2013) - [j9]Yong Chen, Pui-In Mak, Stefano D'Amico, Li Zhang, He Qian, Yan Wang:
A Single-Branch Third-Order Pole-Zero Low-Pass Filter With 0.014-mm2 Die Size and 0.8-kHz (1.25-nW) to 0.94-GHz (3.99-mW) Bandwidth-Power Scalability. IEEE Trans. Circuits Syst. II Express Briefs 60-II(11): 761-765 (2013) - [c36]Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins:
Sub-threshold standard cell library design for ultra-low power biomedical applications. EMBC 2013: 1454-1457 - [c35]Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 1.83 μW, 0.78 μVrms input referred noise neural recording front end. ISCAS 2013: 405-408 - [c34]Md. Tawfiq Amin, Pui-In Mak, Rui Paulo Martins:
A 0.5V 10GHz 8-phase LC-VCO Combining current-reuse and back-gate-coupling techniques consuming 2mW. ISCAS 2013: 2698-2701 - [c33]Ka Fai Lao, Chiman Wong, Feng Wan, Pui-In Mak, Peng Un Mak, Mang I Vai:
Canonical Correlation Analysis Neural Network for Steady-State Visual Evoked Potentials Based Brain-Computer Interfaces. ISNN (2) 2013: 276-283 - [c32]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
A 1.7mW 0.22mm2 2.4GHz ZigBee RX exploiting a current-reuse blixer + hybrid filter topology in 65nm CMOS. ISSCC 2013: 448-449 - 2012
- [j8]Boyu Wang, Chiman Wong, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai:
Trial pruning based on genetic algorithm for single-trial EEG classification. Comput. Electr. Eng. 38(1): 35-44 (2012) - [j7]Chio-In Ieong, Pui-In Mak, Chi-Pang Lam, Cheng Dong, Mang I Vai, Peng Un Mak, Sio-Hang Pun, Feng Wan, Rui Paulo Martins:
A 0.83-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform for Wireless ECG Acquisition in 0.35-µm CMOS. IEEE Trans. Biomed. Circuits Syst. 6(6): 586-595 (2012) - [c31]Yinsidi Jiao, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A dynamic-range-improved 2.4GHz WLAN class-E PA combining PWPM and cascode modulation. APCCAS 2012: 148-151 - [c30]Yanjie Xiao, Tan-Tan Zhang, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A 0.8 µW 8-bit 1.5∼20-pF-input-range capacitance-to-digital converter for lab-on-chip digital microfluidics systems. BioCAS 2012: 384-387 - [c29]Chin Ian Lou, Daria Migotina, João P. Rodrigues, João D. Semedo, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai, Fernando Melicio, J. Gomes Pereira, Agostinho C. Rosa:
Object Recognition Test in Peripheral Vision: A Study on the Influence of Object Color, Pattern and Shape. Brain Informatics 2012: 18-26 - [c28]Teng Cao, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai, Yong Hu:
Flashing color on the performance of SSVEP-based brain-computer interfaces. EMBC 2012: 1819-1822 - [c27]Miguel A. Martins, Pui-In Mak, Rui Paulo Martins:
A 0.02-to-6GHz SDR balun-LNA using a triple-stage inverter-based amplifier. ISCAS 2012: 472-475 - [c26]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A 0.016mm2 144μW three-stage amplifier capable of driving 1-to-15nF capacitive load with >0.95MHz GBW. ISSCC 2012: 368-370 - [c25]Yue Liu, Xiao Jiang, Teng Cao, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai:
Implementation of SSVEP based BCI with Emotiv EPOC. VECIMS 2012: 34-37 - [c24]Wenya Nan, Lanshin Chang, João P. Rodrigues, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai, Agostinho C. Rosa:
Neurofeedback for the treatment of schizophrenia: Case study. VECIMS 2012: 78-81 - 2011
- [j6]Pui-In Mak, Rui Paulo Martins:
A 0.46-mm 2 4-dB NF Unified Receiver Front-End for Full-Band Mobile TV in 65-nm CMOS. IEEE J. Solid State Circuits 46(9): 1970-1984 (2011) - [c23]Tan-Tan Zhang, Pui-In Mak, Mang I Vai, Peng Un Mak, Feng Wan, Rui Paulo Martins:
An ultra-low-power filtering technique for biomedical applications. EMBC 2011: 1859-1862 - [c22]Weng-Fai Cheng, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
A highly-linear ultra-wideband balun-LNA for cognitive radios. EUROCON 2011: 1-4 - [c21]Boyu Wang, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai:
Entropy penalized learning for Gaussian mixture models. IJCNN 2011: 2067-2073 - [c20]Chiman Wong, Boyu Wang, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai:
A Solution to harmonic frequency problem: Frequency and phase coding-based brain-computer interface. IJCNN 2011: 2119-2126 - [c19]Miao Liu, Pui-In Mak, Zushu Yan, Rui Paulo Martins:
A high-voltage-enabled recycling folded cascode OpAmp for nanoscale CMOS technologies. ISCAS 2011: 33-36 - [c18]Miguel A. Martins, Pui-In Mak, Rui Paulo Martins:
A single-to-differential LNA topology with robust output gain-phase balancing against balun imbalance. ISCAS 2011: 289-292 - [c17]Pui-In Mak, Rui Paulo Martins:
A 0.46mm2 4dB-NF unified receiver front-end for full-band mobile TV in 65nm CMOS. ISSCC 2011: 172-174 - [c16]Boyu Wang, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai:
Robust Learning of Mixture Models and Its Application on Trial Pruning for EEG Signal Analysis. PAKDD Workshops 2011: 408-419 - 2010
- [j5]Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
Analysis and Design of Open-Loop Multiphase Local-Oscillator Generator for Wireless Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(5): 970-981 (2010) - [c15]Miguel A. Martins, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
SC biquad filter with hybrid utilization of OpAmp and comparator-based circuit. ISCAS 2010: 1276-1279 - [c14]Yong Chen, Pui-In Mak, Yumei Zhou:
Source-follower-based bi-quad cell for continuous-time zero-pole type filters. ISCAS 2010: 3629-3632
2000 – 2009
- 2009
- [j4]Pui-In Mak, Rui Paulo Martins:
Design of an ESD-Protected Ultra-Wideband LNA in Nanoscale CMOS for Full-Band Mobile TV Tuners. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 933-942 (2009) - [c13]Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
An Open-loop Octave-phase Local-oscillator Generator with High-precision Correlated Phases for VHF/UHF Mobile-TV Tuners. ISCAS 2009: 433-436 - [c12]Chon-Teng Ma, Pui-In Mak, Mang I Vai, Peng Un Mak, Sio-Hang Pun, Feng Wan, Rui Paulo Martins:
A 90nm CMOS Bio-potential Signal Readout Front-end with Improved Powerline Interference Rejection. ISCAS 2009: 665-668 - 2008
- [j3]Pui-In Mak, Seng-Pan U., Rui Paulo Martins:
On the Design of a Programmable-Gain Amplifier With Built-In Compact DC-Offset Cancellers for Very Low-Voltage WLAN Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(2): 496-509 (2008) - [c11]Ka-Fai Un, Pui-In Mak, Rui Paulo da Silva Martins:
A DC-offset-compensated, CT/DT hybrid filter with process-insensitive cutoff and low in-band group-delay variation for WLAN receivers. APCCAS 2008: 1360-1363 - [c10]Pui-In Mak, Ka-Hou Ao Ieong, Rui Paulo Martins:
An open-source-input, ultra-wideband LNA with mixed-voltage ESD protection for full-band (170-to-1700 MHz) mobile TV tuners. ISCAS 2008: 668-671 - 2007
- [j2]Pui-In Mak, Seng-Pan U, Rui Paulo Martins:
Experimental 1-V flexible-IF CMOS analoguebaseband chain for IEEE 802.11a/b/g WLAN receivers. IET Circuits Devices Syst. 1(6): 415-426 (2007) - [c9]Weng-leng Mok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins:
A Highly-Linear Successive-Approximation Front-End Digitizer with Built-in Sample-and-Hold Function for Pipeline/Two-Step ADC. ISCAS 2007: 1947-1950 - 2006
- [c8]Pui-In Mak, Seng-Pan U., Rui Paulo Martins:
Design and test strategy underlying a low-voltage analog-baseband IC for 802.11a/b/g WLAN SiP receivers. ISCAS 2006 - 2005
- [j1]Pui-In Mak, Seng-Pan U, Rui Paulo Martins:
Two-step channel selection-a novel technique for reconfigurable multistandard transceiver front-ends. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(7): 1302-1315 (2005) - [c7]Pui-In Mak, Seng-Pan U, Rui Paulo Martins:
A 1-V transient-free and DC-offset-canceled PGA with a 17.1-MHz constant bandwidth over 52-dB control range in 0.35-μm CMOS. CICC 2005: 649-652 - [c6]Ka-Hou Ao Ieong, Chong-Yin Fok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins:
A frequency up-conversion and two-step channel selection embedded CMOS D/A interface. ISCAS (1) 2005: 392-395 - 2004
- [c5]Pui-In Mak, Seng-Pan U., Rui Paulo Martins:
A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications. ISCAS (4) 2004: 417-420 - [c4]Pui-In Mak, Man-Chung Wong, Seng-Pan U.:
A 3D PWM control, H-bridge tri-level inverter for power quality compensation in three-phase four-wired systems. ISCAS (5) 2004: 948-951 - [c3]Pui-In Mak, Kin-Kwan Ma, Weng-leng Mok, Chi-sam Sou, Kit-man Ho, Cheng-Man Ng, Seng-Pan U., Rui Paulo Martins:
An I/Q-multiplexed and OTA-shared CMOS pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiver. ISCAS (1) 2004: 1068-1071 - 2003
- [c2]Pui-In Mak, Chi-sam Sou, Seng-Pan U, Rui Paulo Martins:
Frequency-downconversion and IF channel selection A-DQS sample-and-hold pair for two-step-channel-select low-IF receiver. ICECS 2003: 479-482 - [c1]Pui-In Mak, Seng-Pan U, Rui Paulo Martins:
A front-to-back-end modeling of I/Q mismatch effects in a complex-IF receiver for image-rejection enhancement. ICECS 2003: 631-634
Coauthor Index
[j210] [j191] [j189] [j170] [j166] [c128] [c119] [j157] [j154] [j153] [j152] [j151] [j145] [j144] [j142] [j135] [j134] [j132] [j130] [j129] [j128] [j127] [j126] [c112] [c109] [j124] [j123] [j121] [j120] [j116] [j114] [j106] [j105] [j104] [j103] [j102] [c99] [c94] [j101] [j98] [j95] [j94] [j90] [j87] [c86] [c85] [j85] [j80] [c83] [c76] [j71] [j66] [j64] [j59] [c75] [c74] [c73] [c72] [c71] [j45] [j44] [j23] [j11] [j9] [c14]
Man Kay Law
aka: Man-Kay Law
aka: Man-Kay Law
[j202] [j186] [j184] [j183] [j180] [j167] [j163] [j158] [c134] [c132] [c122] [j150] [j143] [j140] [j131] [c117] [c115] [c105] [j119] [j111] [j107] [c102] [c101] [c98] [c95] [c93] [j100] [j99] [j98] [j96] [j86] [c92] [c89] [j83] [c81] [c80] [c79] [j72] [j65] [c70] [j53] [j51] [c66] [c63] [j43] [j40] [j39] [j35] [c59] [c57] [j33] [j32] [j30] [c54] [c49] [j27] [j25] [j22] [j21] [c48] [c43] [c42] [c41] [c38] [j15] [j14] [j12] [c36] [c35] [c30] [c26]
Rui Paulo Martins
aka: Rui Paulo da Silva Martins
aka: Rui Paulo da Silva Martins
[j210] [j209] [j208] [j207] [j206] [j205] [j204] [j203] [j202] [j201] [j199] [j198] [j197] [j196] [j195] [j194] [j192] [j191] [c152] [c151] [c150] [c147] [c145] [c144] [c143] [c140] [c139] [j190] [j189] [j188] [j187] [j186] [j184] [j183] [j182] [j180] [j179] [j177] [j176] [j175] [j173] [j168] [j167] [j166] [j165] [j163] [j162] [j161] [j160] [j159] [j158] [c137] [c136] [c135] [c134] [c133] [c132] [c131] [c129] [c128] [c127] [c126] [c125] [c123] [c122] [c120] [c118] [j157] [j156] [j155] [j154] [j153] [j152] [j151] [j150] [j149] [j148] [j147] [j146] [j145] [j144] [j143] [j142] [j141] [j140] [j138] [j137] [j135] [j134] [j133] [j132] [j131] [j130] [j127] [j126] [c117] [c115] [c113] [c112] [c111] [c110] [c109] [c108] [c107] [c105] [j125] [j124] [j123] [j122] [j121] [j120] [j119] [j118] [j117] [j116] [j115] [j114] [j113] [j112] [j111] [j109] [j108] [j107] [j106] [j105] [j104] [j103] [j102] [c104] [c102] [c101] [c99] [c98] [c97] [c96] [c95] [c94] [c93] [j101] [j100] [j99] [j98] [j97] [j96] [j95] [j94] [j93] [j92] [j91] [j90] [j89] [j88] [j87] [j86] [c92] [c91] [c90] [c89] [c88] [c87] [c86] [c85] [c84] [j85] [j84] [j83] [j82] [j81] [j80] [j79] [j78] [j77] [j76] [c83] [c82] [c81] [c80] [c79] [c78] [c77] [c76] [j75] [j74] [j73] [j72] [j71] [j70] [j69] [j68] [j67] [j66] [j65] [j64] [j63] [j62] [j61] [j59] [c75] [c74] [c73] [c72] [c71] [c70] [c69] [j55] [j54] [j53] [j52] [j51] [j50] [j49] [j48] [j47] [j46] [j45] [j44] [c68] [c67] [c66] [c65] [c64] [c63] [c62] [c61] [j43] [j42] [j41] [j40] [j39] [j37] [j36] [j35] [c60] [c59] [c57] [c56] [j33] [j32] [j31] [j30] [c55] [c54] [c53] [c52] [c51] [c50] [c49] [j29] [j28] [j27] [j26] [j25] [j24] [j22] [j21] [c48] [c45] [j20] [j19] [j18] [j17] [j16] [c44] [c43] [c42] [c41] [c40] [c39] [c38] [j15] [j14] [j13] [j12] [j10] [c36] [c35] [c34] [c32] [j7] [c31] [c30] [c27] [c26] [j6] [c23] [c22] [c19] [c18] [c17] [j5] [c15] [j4] [c13] [c12] [j3] [c11] [c10] [j2] [c9] [c8] [j1] [c7] [c6] [c5] [c3] [c2] [c1]
[j209] [j204] [j203] [j202] [j200] [j198] [j197] [j196] [j193] [c147] [c144] [c143] [c142] [j179] [j176] [j172] [j171] [j169] [j164] [j162] [c133] [c127] [c124] [j141] [j139] [j136] [j128] [c114] [c110] [c107] [j115] [j113] [j110] [j108] [j98] [j92] [j91] [j89] [c90] [c88] [j84] [j82] [j79] [j77] [j76] [c78] [c77] [j75] [j74] [j73] [j70] [j69] [j68] [j67] [j63] [j61] [c69] [j54] [j52] [j50] [j48] [j47] [c68] [c65] [c64] [c62] [c61] [j42] [c56] [j31] [c52] [c51]
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-10-17 00:24 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
