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Sheng Lin 0006

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affiliation: Northeastern University, Department of Electrical and Computer Engineering, Boston, MA, USA
affiliation (2004-2007): National High-Performance IC Design Center, Shanghai, China
affiliation (former): Zhejiang University, Department of electrical engineering, Hangzhou, China

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2010 – 2019

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2011
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Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi:
A 11-Transistor Nanoscale CMOS Memory Cell for Hardening to Soft Errors. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 900-904 (2011)
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Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi:
Modeling and design of a nanoscale memory cell for hardening to a single event with multiple node upset. ICCD 2011: 320-325
2010
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Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi:
Design and analysis of a 32 nm PVT tolerant CMOS SRAM cell for low leakage and high stability. Integr. 43(2): 176-187 (2010)
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Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi:
Read-out schemes for a CNTFET-based crossbar memory. ACM Great Lakes Symposium on VLSI 2010: 167-170

2000 – 2009

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2009
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Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi:
A Novel Hardened Design of a CMOS Memory Cell at 32nm. DFT 2009: 58-64
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Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi:
Soft-Error Hardening Designs of Nanoscale CMOS Latches. VTS 2009: 41-46
2008
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Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi:
A low leakage 9t sram cell for ultra-low power operation. ACM Great Lakes Symposium on VLSI 2008: 123-126

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