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ORCIDChandu Visweswariah
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- affiliation: Thomas J. Watson Research Center, Yorktown Heights, USA
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2010 – 2019
- 2016
[j8]Kevin Warren, Ron F. Ambrosio, Bei Chen, Yuhui Fu, Soumyadip Ghosh, Dzung T. Phan, Mathieu Sinn, Chunhua Tian, Chandu Visweswariah:
Managing uncertainty in electricity generation and demand forecasting. IBM J. Res. Dev. 60(1) (2016)- 2013
- [j7]Yiyu Shi, Jinjun Xiong
, Vladimir Zolotov, Chandu Visweswariah:
Order statistics for correlated random variables and its application to at-speed testing. ACM Trans. Design Autom. Electr. Syst. 18(3): 42:1-42:20 (2013) - [c29]Vimitha A. Kuruvilla, Debjit Sinha, Jeff Piaget, Chandu Visweswariah, Nitin Chandrachoodan:
Speeding up computation of the max/min of a set of gaussians for statistical timing analysis and optimization. DAC 2013: 182:1-182:7 - 2012
- [j6]Eric A. Foreman, Peter A. Habitz, Ming-C. Cheng, Chandu Visweswariah:
A Novel Method for Reducing Metal Variation With Statistical Static Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1293-1297 (2012) - [c28]Vladimir Zolotov, Debjit Sinha, Jeffrey G. Hemmett, Eric A. Foreman, Chandu Visweswariah, Jinjun Xiong, Jeremy Leitzen, Natesan Venkateswaran:
Timing analysis with nonseparable statistical and deterministic variations. DAC 2012: 1061-1066 - [c27]Debjit Sinha, Chandu Visweswariah, Natesan Venkateswaran, Jinjun Xiong, Vladimir Zolotov:
Reversible statistical max/min operation: concept and applications to timing. DAC 2012: 1067-1073 - [c26]Wangyang Zhang, Amith Singhee, Jinjun Xiong, Peter A. Habitz, Amol Joshi, Chandu Visweswariah, James Sundquist:
A dynamic method for efficient random mismatch characterization of standard cells. ICCAD 2012: 180-186 - 2010
- [j5]Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chandu Visweswariah:
Statistical Path Selection for At-Speed Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(5): 749-759 (2010) - [c25]Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu:
Transistor sizing of custom high-performance digital circuits with parametric yield considerations. DAC 2010: 781-786
2000 – 2009
- 2009
- [j4]Howard Chen, Scott Neely, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah:
Statistical Power Analysis for High-Performance Processors. J. Low Power Electron. 5(1): 70-76 (2009) - [j3]Debjit Sinha, Alex Rubin, Chandu Visweswariah, Frank Borkam, Gregory Schaeffer, Soroush Abbaspour:
Feasible Aggressor-Set Identification Under Constraints for Maximum Coupling Noise. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(7): 1096-1100 (2009) - [j2]Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah, Peter A. Habitz:
Optimal Test Margin Computation for At-Speed Structural Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1414-1423 (2009) - [c24]David D. Ling, Chandu Visweswariah, Peter Feldmann, Soroush Abbaspour:
A moment-based effective characterization waveform for static timing analysis. DAC 2009: 19-24 - [c23]Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov:
Statistical ordering of correlated timing quantities and its application for path ranking. DAC 2009: 122-125 - [c22]Jinjun Xiong, Yiyu Shi, Vladimir Zolotov, Chandu Visweswariah:
Statistical multilayer process space coverage for at-speed test. DAC 2009: 340-345 - [c21]Jiniun Xionq, Yiyu Shi, Vladimir Zolotov, Chandu Visweswariah:
Pre-ATPG path selection for near optimal post-ATPG process space coverage. ICCAD 2009: 89-96 - [c20]Vladimir Zolotov, Chandu Visweswariah, Jinjun Xiong:
Voltage binning under process variation. ICCAD 2009: 425-432 - [c19]Milena Vratonjic, Matthew M. Ziegler, George Gristede, Victor V. Zyuban, Thomas Mitchell, Ee Cho, Chandu Visweswariah, Vojin G. Oklobdzija:
A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR). PATMOS 2009: 307-316 - [c18]Bernard Courtois, Chandu Visweswariah:
Special Session 8: New Topics: At-Speed Testing in the Face of Process Variations. VTS 2009: 237 - 2008
- [c17]Ruiming Chen, Lizheng Zhang, Vladimir Zolotov, Chandu Visweswariah, Jinjun Xiong:
Static timing: Back to our roots. ASP-DAC 2008: 310-315 - [c16]Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah, Peter A. Habitz:
Optimal Margin Computation for At-Speed Test. DATE 2008: 622-627 - [c15]Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah:
Incremental Criticality and Yield Gradients. DATE 2008: 1130-1135 - [c14]Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chandu Visweswariah:
Statistical path selection for at-speed test. ICCAD 2008: 624-631 - [c13]Chandu Visweswariah:
Plenary Speech 2P2: Statistical Techniques to Achieve Robustness and Quality. ISQED 2008: 586 - [c12]Howard Chen, Scott Neely, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah:
Statistical Modeling and Analysis of Static Leakage and Dynamic Switching Power. PATMOS 2008: 178-187 - 2007
- [c11]Vikram Iyengar, Jinjun Xiong, Subbayyan Venkatesan, Vladimir Zolotov, David E. Lackey, Peter A. Habitz, Chandu Visweswariah:
Variation-aware performance verification using at-speed structural test and statistical timing. ICCAD 2007: 405-412 - [c10]Vladimir Zolotov, Jinjun Xiong, Soroush Abbaspour, David J. Hathaway, Chandu Visweswariah:
Compact modeling of variational waveforms. ICCAD 2007: 705-712 - [c9]Chandu Visweswariah:
Fear, uncertainty and statistics. ISPD 2007: 169 - 2006
- [c8]Jinjun Xiong, Vladimir Zolotov, Natesan Venkateswaran, Chandu Visweswariah:
Criticality computation in parameterized statistical timing. DAC 2006: 63-68 - [c7]Chandu Visweswariah:
Statistical analysis and optimization in the presence of gate and interconnect delay variations. SLIP 2006: 37 - 2005
- [c6]Hongliang Chang, Vladimir Zolotov, Sambasivan Narayan, Chandu Visweswariah:
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions. DAC 2005: 71-76 - [c5]Matthew R. Guthaus, Natesan Venkateswaran, Chandu Visweswariah, Vladimir Zolotov:
Gate sizing using incremental parameterized statistical timing analysis. ICCAD 2005: 1029-1036 - 2004
- [c4]Chandu Visweswariah:
Statistical analysis and design: from picoseconds to probabilities. SBCCI 2004: 2 - 2003
- [c3]Chandu Visweswariah:
Death, taxes and failing chips. DAC 2003: 343-347 - [c2]Jurjen Westra, Dirk-Jan Jongeneel, Ralph H. J. M. Otten, Chandu Visweswariah:
Time Budgeting in a Wireplanning Context. DATE 2003: 10436-10441
1990 – 1999
- 1999
- [j1]Andrew R. Conn, Luís Nunes Vicente, Chandu Visweswariah:
Two-Step Algorithms for Nonlinear Optimization with Structured Applications. SIAM J. Optim. 9(4): 924-947 (1999) - 1992
- [c1]Chandu Visweswariah:
Stepsize Control in Piecewise Approximate Circuit Simulation. VLSI Design 1992: 287-292
Coauthor Index
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