A VLSI design of an arrayed pipelined Tomlinson-Harashima precoder for MU-MIMO systems.

Tue, 01 Jan 2013 00:00:00 +0100

Kosuke Shimazaki, Shingo Yoshizawa, Yasuyuki Hatakawa, Tomoko Matsumoto, Satoshi Konishi, Yoshikazu Miyanaga :
A VLSI design of an arrayed pipelined Tomlinson-Harashima precoder for MU-MIMO systems. APSIPA 2013: 1-4