A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.

Tue, 01 Jan 2013 00:00:00 +0100

Kosuke Shimazaki, Shingo Yoshizawa, Yasuyuki Hatakawa, Tomoko Matsumoto, Satoshi Konishi, Yoshikazu Miyanaga :
A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(11): 2114-2119 (2013)