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Grzegorz Deptuch
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2020 – today
- 2024
- [i2]Shubha R. Kharel, Prashansa Mukim, Piotr Maj, Grzegorz W. Deptuch, Shinjae Yoo, Yihui Ren, Soumyajit Mandal:
Automated and Holistic Co-design of Neural Networks and ASICs for Enabling In-Pixel Intelligence. CoRR abs/2407.14560 (2024) - 2023
- [c10]Nicholas St. John, Soumyajit Mandal, Eric Raguzin, Piotr Maj, Grzegorz W. Deptuch
:
Self-Adaptation of Line Driver Pre-Emphasis Parameters via Embedded Line Loss Sensing. PRIME 2023: 249-252 - 2022
- [c9]Sandeep Miryala, Md. Adnan Zaman, Sandeep Mittal, Yihui Ren
, Grzegorz Deptuch
, Gabriella Carini, Sioan Zohar, Shinjae Yoo, Jack Fried, Jin Huang, Srinivas Katkoori
:
Peak Prediction Using Multi Layer Perceptron (MLP) for Edge Computing ASICs Targeting Scientific Applications. ISQED 2022: 1-6 - [c8]Sandeep Miryala, Gabriella Carini, Grzegorz Deptuch
, Jin Huang, Srinivas Katkoori
, Piotr Maj, Soumyajit Mandal, Yihui Ren
, Md. Adnan Zaman:
Design and Challenges of Edge Computing ASICs on Front-End Electronics. ISQED 2022: 19-27 - [c7]Dominik Gorni, Grzegorz Deptuch
, Sandeep Miryala:
Investigation of Timing Properties for an Event Driven with Access and Reset Decoder Readout Architecture for a Pixel Array. PRIME 2022: 113-116 - [i1]Nicholas St. John, Soumyajit Mandal, Grzegorz W. Deptuch
, Eric Raguzin, Sergio Rescia:
A Low-Power 1 Gb/s Line Driver with Configurable Pre-Emphasis for Lossy Transmission Lines. CoRR abs/2210.11882 (2022) - 2020
- [c6]Vamshi Manthena, Sandeep Miryala, Grzegorz Deptuch
, Gabriella Carini:
A 1.2-V 6-GHz Dual-Path Charge-Pump PLL Frequency Synthesizer for Quantum Control and Readout in CMOS 65-nm Process. UEMCON 2020: 570-576
2010 – 2019
- 2018
- [j2]Piotr Otfinowski
, Grzegorz Deptuch
, Piotr Maj
:
Asynchronous Approximation of a Center of Gravity for Pixel Detectors' Readout Circuits. IEEE J. Solid State Circuits 53(5): 1550-1558 (2018) - [j1]Grzegorz Deptuch
, Farah Fahim
, Pawel Grybos
, Jim Hoff, Scott Holm, Piotr Maj
, David Peter Siddons, Piotr Kmon
, Marcel Trimpl, Tom Zimmerman:
An Algorithm of an X-ray Hit Allocation to a Single Pixel in a Cluster and Its Test-Circuit Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(1): 185-197 (2018) - 2017
- [c5]Siddhartha Joshi, Dawei Li, Seda Ogrenci Memik, Grzegorz Deptuch
, James Hoff
, Sergo Jindariani, Tiehui Liu, Jamieson Olsen, Nhan Tran:
A content addressable memory with multi-Vdd scheme for low power tunable operation. MWSCAS 2017: 401-404 - 2015
- [c4]Farah Fahim, Vala Fathipouri, Grzegorz Deptuch
, Hooman Mohseni
:
Pixellated readout IC: Analysis for single photon infrared detector for fast time of arrival applications. ISCAS 2015: 682-685 - 2014
- [c3]Pawel Grybos
, Aleksandra Drozd, Grzegorz Deptuch
, Krzysztof Kasinski
, Rafal Kleczek
, Piotr Kmon
, Piotr Maj
, Piotr Otfmowski, Jacek Rauza, Robert Szczygiel
, Tomasz Satlawa, Miroslaw Zoladz:
Ultra fast X-ray detection systems in nanometer and 3D technologies. MIXDES 2014: 38-41 - 2010
- [c2]Grzegorz Deptuch
:
3DIC multi-project fabrication run being organized by CMC/CMP/MOSIS and Tezzaron. 3DIC 2010: 1-10 - [c1]Grzegorz Deptuch
, Marcel Demarteau
, Jim Hoff, Ronald Lipton, Alpana Shenai, Raymond Yarema, Tom Zimmerman:
Pixel detectors in 3D technologies for high energy physics. 3DIC 2010: 1-4
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last updated on 2024-08-23 18:28 CEST by the dblp team
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