![](https://dblp.dagstuhl.de/img/logo.ua.320x120.png)
![](https://dblp.dagstuhl.de/img/dropdown.dark.16x16.png)
![](https://dblp.dagstuhl.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
![search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
default search action
Ed F. Deprettere
Person information
Refine list
![note](https://dblp.dagstuhl.de/img/note-mark.dark.12x12.png)
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2010 – 2019
- 2013
- [p3]Shuvra S. Bhattacharyya, Ed F. Deprettere, Bart D. Theelen:
Dynamic Dataflow Graphs. Handbook of Signal Processing Systems 2013: 905-944 - [p2]Joachim Keinert, Ed F. Deprettere:
Multidimensional Dataflow Graphs. Handbook of Signal Processing Systems 2013: 1145-1175 - [e5]Shuvra S. Bhattacharyya, Ed F. Deprettere, Rainer Leupers, Jarmo Takala
:
Handbook of Signal Processing Systems. Springer 2013, ISBN 978-1-4614-6858-5 [contents] - 2012
- [c86]Ed F. Deprettere:
Special session on "aspects of Cyber-Physical Systems". ICSAMOS 2012: 318 - 2011
- [c85]Adarsha Rao, S. K. Nandy, Hristo Nikolov, Ed F. Deprettere:
USHA: Unified software and hardware architecture for video decoding. SASP 2011: 30-37 - 2010
- [p1]Shuvra S. Bhattacharyya, Ed F. Deprettere, Joachim Keinert:
Dynamic and Multidimensional Dataflow Graphs. Handbook of Signal Processing Systems 2010: 899-930 - [e4]Shuvra S. Bhattacharyya, Ed F. Deprettere, Rainer Leupers, Jarmo Takala
:
Handbook of Signal Processing Systems. Springer 2010, ISBN 978-1-4419-6344-4 [contents] - [e3]Ed F. Deprettere, Todor P. Stefanov:
13th International Workshop on Software and Compilers for Embedded Systems, SCOPES '10, St. Goar, Germany, June 29-30, 2010. ACM 2010, ISBN 978-1-4503-0084-1 [contents]
2000 – 2009
- 2009
- [c84]Ed F. Deprettere, Ana Lucia Varbanescu:
Introduction to Mastering Cell BE and GPU Execution Platforms. SAMOS 2009: 275-276 - [c83]Dmitry Nadezhkin, Sjoerd Meijer, Todor P. Stefanov
, Ed F. Deprettere:
Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell. SAMOS 2009: 308-317 - 2008
- [j41]Hristo Nikolov, Todor P. Stefanov
, Ed F. Deprettere:
Automated Integration of Dedicated Hardwired IP Cores in Heterogeneous MPSoCs Designed with ESPAM. EURASIP J. Embed. Syst. 2008 (2008) - [j40]Steven Derrien, Alexandru Turjan, Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
Deriving efficient control in Process Networks with Compaan/Laura. Int. J. Embed. Syst. 3(3): 170-180 (2008) - [j39]Hristo Nikolov, Todor P. Stefanov
, Ed F. Deprettere:
Systematic and Automated Multiprocessor System Design, Programming, and Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(3): 542-555 (2008) - [c82]Hristo Nikolov, Mark Thompson, Todor P. Stefanov, Andy D. Pimentel, Simon Polstra, Raj Bose, Claudiu Zissulescu, Ed F. Deprettere:
Daedalus: toward composable multimedia MP-SoC design. DAC 2008: 574-579 - [c81]Andy D. Pimentel
, Todor P. Stefanov
, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere:
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study. SAMOS 2008: 167-176 - [c80]Bin Jiang, Ed F. Deprettere, Bart Kienhuis:
Hierarchical run time deadlock detection in process networks. SiPS 2008: 239-244 - 2007
- [j38]Ed F. Deprettere, Roger F. Woods
, Ingrid Verbauwhede
, Erwin A. de Kock:
Transforming Signal Processing Applications into Parallel Implementations. EURASIP J. Adv. Signal Process. 2007 (2007) - [j37]Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
Classifying interprocess communication in process network representation of nested-loop programs. ACM Trans. Embed. Comput. Syst. 6(2): 13 (2007) - [j36]Ming-Yung Ko, Claudiu Zissulescu, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya
, Bart Kienhuis, Ed F. Deprettere:
Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Trans. Signal Process. 55(6-2): 3126-3138 (2007) - [c79]Mark Thompson, Hristo Nikolov, Todor P. Stefanov
, Andy D. Pimentel, Cagkan Erbas, Simon Polstra, Ed F. Deprettere:
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs. CODES+ISSS 2007: 9-14 - [c78]Hristo Nikolov, Todor P. Stefanov
, Ed F. Deprettere:
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips. FPL 2007: 580-584 - 2006
- [j35]Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere:
Requirements for Interfacing IP-Components in Re-configurable Platforms. J. VLSI Signal Process. 43(2-3): 173-184 (2006) - [c77]Ed F. Deprettere, Todor P. Stefanov
, Shuvra S. Bhattacharyya
, Mainak Sen:
Affine Nested Loop Programs and their Binary Parameterized Dataflow Graph Counterparts. ASAP 2006: 186-190 - [c76]Hristo Nikolov, Todor P. Stefanov
, Ed F. Deprettere:
Multi-processor system design with ESPAM. CODES+ISSS 2006: 211-216 - [c75]Jérôme Lemaitre, Ed F. Deprettere:
FPGA Implementation of a Prototype Hierarchical Control Network for Large-Scale Signal Processing Applications. Euro-Par 2006: 1192-1203 - [c74]Hristo Nikolov, Todor P. Stefanov
, Ed F. Deprettere:
Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips. FPL 2006: 1-6 - 2005
- [j34]Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
Solving Out-of-Order Communication in Kahn Process Networks. J. VLSI Signal Process. 40(1): 7-18 (2005) - [c73]Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
Expression Synthesis in Process Networks generated by LAURA. ASAP 2005: 15-21 - [c72]Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere:
Behavioral specification of control interface for signal processing applications. ASAP 2005: 43-49 - [c71]Hristo Nikolov, Todor P. Stefanov
, Ed F. Deprettere:
Modeling and FPGA Implementation of Applications Using Parameterized Process Networks with Non-Static Parameters. FCCM 2005: 255-263 - [c70]Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
Communication Synthesis in a multiprocessor environment. FPL 2005: 360-365 - [c69]Mihai-Lucian Cristea, Claudiu Zissulescu, Ed F. Deprettere, Herbert Bos:
FPL-3E: Towards Language Support for Reconfigurable Packet Processing. SAMOS 2005: 82-92 - 2004
- [c68]Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks. ASAP 2004: 282-292 - [c67]Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
Translating affine nested-loop programs to process networks. CASES 2004: 220-229 - [c66]Todor P. Stefanov
, Claudiu Zissulescu, Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
System Design Using Kahn Process Networks: The Compaan/Laura Approach. DATE 2004: 340-345 - [c65]Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere:
Increasing Pipelined IP Core Utilization in Process Networks Using Exploration. FPL 2004: 690-699 - [c64]Sylvain Alliot, Ed F. Deprettere:
Architecture Exploration of a Large Scale System. IEEE International Workshop on Rapid System Prototyping 2004: 217-224 - [c63]Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere:
On the (Re-)Use of IP-Components in Re-configurable Platforms. SAMOS 2004: 264-273 - [c62]Ioan Cimpian, Alexandru Turjan, Ed F. Deprettere, Erwin A. de Kock:
Communication Optimization in Compaan Process Networks. SAMOS 2004: 494-506 - [c61]Laurentiu Nicolae, Ed F. Deprettere:
Constraints Derivation and Propagation for Large-Scale Embedded Systems Exploration. SAMOS 2004: 550-560 - [c60]Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
An Integer Linear Programming Approach to Classify the Communication in Process Networks. SCOPES 2004: 62-76 - 2003
- [j33]Aweke N. Lemma, Alle-Jan van der Veen
, Ed F. Deprettere:
Analysis of joint angle-frequency estimation using ESPRIT. IEEE Trans. Signal Process. 51(5): 1264-1283 (2003) - [j32]Bart Kienhuis, Ed F. Deprettere:
Modeling Stream-Based Applications Using the SBF Model of Computation. J. VLSI Signal Process. 34(3): 291-300 (2003) - [c59]Hylke W. van Dijk, Henk J. Sips, Ed F. Deprettere:
Context-Aware Process Networks. ASAP 2003: 6-16 - [c58]Todor P. Stefanov, Ed F. Deprettere:
Deriving process networks from weakly dynamic applications in system-level design. CODES+ISSS 2003: 90-96 - [c57]Vladimir D. Zivkovic, Erwin A. de Kock, Pieter van der Wolf, Ed F. Deprettere:
Fast and Accurate Multiprocessor Architecture Exploration with Symbolic Programs. DATE 2003: 10656-10661 - [c56]Claudiu Zissulescu, Todor P. Stefanov
, Bart Kienhuis, Ed F. Deprettere:
Laura: Leiden Architecture Research and Exploration Tool. FPL 2003: 911-920 - 2002
- [j31]Ed F. Deprettere, Bart Kienhuis, Richard L. Walke:
Preface. Des. Autom. Embed. Syst. 7(4): 303-305 (2002) - [j30]Tim Harriss, Richard L. Walke, Bart Kienhuis, Ed F. Deprettere:
Compilation From Matlab to Process Networks Realized in FPGA. Des. Autom. Embed. Syst. 7(4): 385-403 (2002) - [c55]Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere:
A Compile Time Based Approach for Solving Out-of-Order Communication in Kahn Process Networks. ASAP 2002: 17-28 - [c54]Todor P. Stefanov, Bart Kienhuis, Ed F. Deprettere:
Algorithmic transformation techniques for efficient exploration of alternative application instances. CODES 2002: 7-12 - [c53]Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees A. Vissers:
A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach. Embedded Processor Design Challenges 2002: 18-37 - [c52]Ed F. Deprettere, Edwin Rijpkema, Bart Kienhuis:
Translating Imperative Affine Nested Loop Programs into Process Networks. Embedded Processor Design Challenges 2002: 89-111 - [e2]Ed F. Deprettere, Jürgen Teich, Stamatis Vassiliadis:
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS. Lecture Notes in Computer Science 2268, Springer 2002, ISBN 3-540-43322-8 [contents] - 2001
- [j29]Andy D. Pimentel, Louis O. Hertzberger, Paul Lieverse, Pieter van der Wolf, Ed F. Deprettere:
Exploring Embedded-Systems Architectures with Artemis. Computer 34(11): 57-63 (2001) - [j28]Jun Ma, Keshab K. Parhi
, Ed F. Deprettere:
A unified algebraic transformation approach for parallel recursive and adaptive filtering and SVD algorithms. IEEE Trans. Signal Process. 49(2): 424-437 (2001) - [j27]Paul Lieverse, Pieter van der Wolf, Kees A. Vissers, Ed F. Deprettere:
A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems. J. VLSI Signal Process. 29(3): 197-207 (2001) - [c51]Paul Lieverse, Pieter van der Wolf, Ed F. Deprettere:
A trace transformation technique for communication refinement. CODES 2001: 134-139 - [c50]Paul Lieverse, Todor P. Stefanov, Pieter van der Wolf, Ed F. Deprettere:
System Level Design with Spade: an M-JPEG Case Study. ICCAD 2001: 31-38 - 2000
- [j26]Edwin Rijpkema, Ed F. Deprettere, Bart Kienhuis:
Deriving Process Networks from Nested Loop Algorithms. Parallel Process. Lett. 10(2/3): 165-176 (2000) - [j25]Jun Ma, Keshab K. Parhi
, Ed F. Deprettere:
Annihilation-reordering look-ahead pipelined CORDIC-based RLS adaptive filters and their application to adaptive beamforming. IEEE Trans. Signal Process. 48(8): 2414-2431 (2000) - [j24]Jun Ma, Keshab K. Parhi
, Gerben J. Hekstra, Ed F. Deprettere:
Efficient implementations of pipelined CORDIC based IIR digital filters using fast orthonormal μ-rotations. IEEE Trans. Signal Process. 48(9): 2712-2716 (2000) - [j23]Gerben J. Hekstra, Ed F. Deprettere, Jeong-A Lee:
Guest Editor's Introduction. J. VLSI Signal Process. 25(2): 99-100 (2000) - [j22]Kees-Jan van der Kolk, Jeong-A Lee, Ed F. Deprettere:
A Floating Point Vectoring Algorithm Based on Fast Rotations. J. VLSI Signal Process. 25(2): 125-139 (2000) - [c49]Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, Bart Kienhuis:
High Level Modeling for Parallel Executions of Nested Loop Algorithms. ASAP 2000: 79-91 - [c48]Bart Kienhuis, Edwin Rijpkema, Ed F. Deprettere:
Compaan: deriving process networks from Matlab for embedded signal processing architectures. CODES 2000: 13-17 - [c47]Aweke N. Lemma, Alle-Jan van der Veen, Ed F. Deprettere:
Analysis of ESPRIT based joint angle-frequency estimation. ICASSP 2000: 3053-3056
1990 – 1999
- 1999
- [j21]Aweke N. Lemma, Alle-Jan van der Veen
, Ed F. Deprettere:
Multiresolution ESPRIT algorithm. IEEE Trans. Signal Process. 47(6): 1722-1726 (1999) - [j20]Paul Lieverse, Ed F. Deprettere, Bart Kienhuis, Erwin A. de Kock:
A Clustering Approach to Explore Grain-Sizes in the Definition of Processing Elements in Dataflow Architectures. J. VLSI Signal Process. 22(1): 9-20 (1999) - [c46]Kees-Jan van der Kolk, Ed F. Deprettere, Jeong-A Lee:
A Floating Point Vectoring Algorithm Based on Fast Rotations. EUROMICRO 1999: 1140- - [c45]Jun Ma, Keshab K. Parhi
, Ed F. Deprettere:
Derivation of parallel and pipelined orthogonal filter architectures via algorithm transformations. ISCAS (3) 1999: 347-350 - [e1]K. J. Ray Liu, Jörn Ostermann, Ed F. Deprettere, W. Bastiaan Kleijn, John Aasted Sørensen:
Third IEEE Workshop on Multimedia Signal Processing, MMSP 1999, Copenhagen, Denmark, September 13-15, 1999. IEEE 1999, ISBN 0-7803-5610-1 [contents] - 1998
- [j19]Laurens Bierens, Ed F. Deprettere:
Efficient Partitioning of Algorithms for Long Convolutions and their Mapping onto Architectures. J. VLSI Signal Process. 18(1): 51-64 (1998) - [c44]Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf:
The construction of a retargetable simulator for an architecture template. CODES 1998: 125-129 - [c43]Aweke N. Lemma, Alle-Jan van der Veen, Ed F. Deprettere:
Joint angle-frequency estimation using multi-resolution ESPRIT. ICASSP 1998: 1957-1960 - [c42]Jun Ma, Keshab K. Parhi
, Ed F. Deprettere:
Pipelined CORDIC based QRD-MVDR adaptive beamforming. ICASSP 1998: 3025-3028 - [c41]Joost Nieuwenhuijse, Richard Heusdens, Ed F. Deprettere:
Robust exponential modeling of audio signals. ICASSP 1998: 3581-3584 - [c40]W. Bastiaan Kleijn
, Huimin Yang, Ed F. Deprettere:
Waveform interpolation coding with pitch-spaced subbands. ICSLP 1998 - 1997
- [c39]Gerben J. Hekstra, Ed F. Deprettere:
Fast Rotations: Low-cost Arithmetic Methods for Orthonormal Rotation. IEEE Symposium on Computer Arithmetic 1997: 116-125 - [c38]Edwin Rijpkema, Gerben J. Hekstra, Ed F. Deprettere, Jun Ma:
A strategy for determining a Jacobi specific dataflow processor. ASAP 1997: 53- - [c37]Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf:
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures. ASAP 1997: 338-349 - [c36]Jun Ma, Keshab K. Parhi
, Ed F. Deprettere:
Pipelining of cordic based IIR digital filters. ICASSP 1997: 643-646 - [c35]Vincent van de Laar, W. Bastiaan Kleijn
, Ed F. Deprettere:
Perceptual entropy rate estimates for the phonemes of American English. ICASSP 1997: 1719-1722 - [c34]Aweke N. Lemma, W. Bastiaan Kleijn
, Ed F. Deprettere:
Quantization using wavelet based temporal decomposition of the LSF. EUROSPEECH 1997: 1259-1262 - 1996
- [j18]Aweke N. Lemma, Ed F. Deprettere:
Two-sided controlled transition in biorthogonal time-varying filter banks. IEEE Signal Process. Lett. 3(2): 47-50 (1996) - [j17]Marc Moonen, Ed F. Deprettere:
A fully pipelined RLS-based array for channel equalization. J. VLSI Signal Process. 14(1): 67-74 (1996) - [c33]Hylke W. van Dijk, Gerben J. Hekstra, Ed F. Deprettere:
Jacobi-Specific Processor Arrays. ASAP 1996: 323- - [c32]Aweke N. Lemma, Ed F. Deprettere:
State space behavior in time-varying biorthogonal filter banks. EUSIPCO 1996: 1-4 - [c31]Laurens Bierens, Ed F. Deprettere:
Engineering multirate convolutions for radar imaging. ICASSP 1996: 3217-3220 - 1995
- [j16]Li-Sheng Shen, Ed F. Deprettere, Patrick M. Dewilde:
A parallel image-rendering algorithm and architecture based on ray tracing and radiosity shading. Comput. Graph. 19(2): 281-296 (1995) - [j15]Hylke W. van Dijk, Gerben J. Hekstra, Ed F. Deprettere:
Scalable parallel processor array for Jacobi-type matrix computations. Integr. 20(1): 41-61 (1995) - [c30]Marc Moonen, Ed F. Deprettere, Ian K. Proudler, John G. McWhirter:
On the derivation of parallel filter structures for adaptive eigenvalue and singular value decompositions. ICASSP 1995: 3247-3250 - 1994
- [j14]Filiep Vanpoucke
, Marc Moonen, Ed F. Deprettere:
Direction finding of multiple wide-band emitters using state-space modeling. Signal Process. 40(1): 39-52 (1994) - [j13]Marc Moonen, Filiep J. Vanpoucke
, Ed F. Deprettere:
Parallel and adaptive high-resolution direction finding. IEEE Trans. Signal Process. 42(9): 2439-2448 (1994) - [c29]Ed F. Deprettere, Gerben J. Hekstra, Li-Sheng Shen, Jichun Bu, Gerrit Boersma:
A parallel system for photo realistic artificial scene rendering. ASAP 1994: 314-323 - [c28]Ed F. Deprettere, Hylke W. van Dijk, Gerben J. Hekstra:
A 'Jacobi' signal processing unit for time-adaptive SVD. ICASSP (2) 1994: 493-496 - [c27]Francky Catthoor, Ed F. Deprettere, Yu Hen Hu, Jan M. Rabaey, Heinrich Meyr, Lothar Thiele:
Is it Possible to achieve a Teraflop/s on a chip? From High Performance Algorithms to Architectures. ISCAS 1994: 129-136 - 1993
- [j12]Ed F. Deprettere:
Example of combined algorithm development and architecture design. Integr. 16(3): 199-220 (1993) - [j11]Alle-Jan van der Veen
, Ed F. Deprettere, A. Lee Swindlehurst
:
Subspace-based signal analysis using singular value decomposition. Proc. IEEE 81(9): 1277-1308 (1993) - [c26]Gerben J. Hekstra, Ed F. Deprettere:
Floating point Cordic. IEEE Symposium on Computer Arithmetic 1993: 130-137 - [c25]Ed F. Deprettere, Richard Heusdens, Hendrik Theunis:
Subband filtering: Cordic modulation and systolic quadrature mirror filter tree. ASAP 1993: 109-123 - 1992
- [j10]Emmanuel D. Frimout, Johannes N. Driessen, Ed F. Deprettere:
Parallel architecture for a pel-recursive motion estimation algorithm. IEEE Trans. Circuits Syst. Video Technol. 2(2): 159-168 (1992) - [j9]Alle-Jan van der Veen
, P. Bas Ober, Ed F. Deprettere:
Azimuth and elevation computation in high resolution DOA estimation. IEEE Trans. Signal Process. 40(7): 1828-1832 (1992) - [c24]Emmanuel D. Frimout, Johannes N. Driessen, Ed F. Deprettere:
Parallel architecture for a pel-recursive motion estimation algorithm. ASAP 1992: 551-558 - [c23]Li-Sheng Shen, Ed F. Deprettere:
A Parallel-Pipelined Multiprocessor System for the Radiosity Method. Eurographics Workshop on Graphics Hardware 1992: 106-122 - 1991
- [j8]Alle-Jan van der Veen
, Ed F. Deprettere:
Parallel VLSI matrix pencil algorithm for high resolution direction finding. IEEE Trans. Signal Process. 39(2): 383-394 (1991) - [j7]Ed F. Deprettere:
Introduction. J. VLSI Signal Process. 3(3): 149 (1991) - [c22]Alfons A. J. de Lange, Ed F. Deprettere:
Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processing. IEEE Symposium on Computer Arithmetic 1991: 272-281 - [c21]Jichun Bu, Ed F. Deprettere:
Processor clustering for the design of optimal fixed-size systolic arrays. ASAP 1991: 402-413 - [c20]Li-Sheng Shen, F. A. J. Laarakker, Ed F. Deprettere:
Space Partitioning for Mapping Radiosity Computations onto a Pipelined Parallel Architecture (II). Advances in Computer Graphics Hardware (Machines) 1991: 175-190 - [c19]A. J. van der Hoeven, Ed F. Deprettere, P. van Prooijen, Patrick M. Dewilde:
A hardware design system based on object-oriented principles. EURO-DAC 1991: 459-463 - [c18]P. Bas Ober, Ed F. Deprettere, Alle-Jan van der Veen:
Efficient methods to compute azimuth and elevation in high resolution DOA estimation. ICASSP 1991: 3349-3352 - 1990
- [j6]A. J. van der Hoeven, Alfons A. J. de Lange, Ed F. Deprettere, Patrick M. Dewilde:
A model for the high-level description and simulation of VLSI networks. IEEE Micro 10(4): 41-48 (1990) - [c17]Jichun Bu, Ed F. Deprettere, Lothar Thiele:
Systolic array implementation of nested loop programs. ASAP 1990: 31-42 - [c16]Jichun Bu, Ed F. Deprettere, Patrick M. Dewilde:
A design methodology for fixed-size systolic arrays. ASAP 1990: 591-602 - [c15]Li-Sheng Shen, Ed F. Deprettere, Patrick M. Dewilde:
A New Space Partitioning for Mapping Computations of the Radiosity Method onto a Highly Pipelined Parallel Architecture. Advances in Computer Graphics Hardware V 1990: 153-170 - [c14]Alfons A. J. de Lange, Ed F. Deprettere, Alle-Jan van der Veen
, Jichun Bu:
Real time application of the floating point pipeline CORDIC processor in massive-parallel pipelined DSP algorithms. ICASSP 1990: 1013-1016
1980 – 1989
- 1989
- [j5]Jichun Bu, Ed F. Deprettere:
A VLSI system architecture for high-speed radiative transfer 3D image synthesis. Vis. Comput. 5(3): 121-133 (1989) - [j4]Paul F. C. Krekel, Ed F. Deprettere:
A systolic algorithm and architecture for solving sets of linear equations with multi-band coefficient matrix. J. VLSI Signal Process. 1(2): 143-152 (1989) - [c13]A. J. van der Hoeven, A. A. de Lange, Ed F. Deprettere, Patrick M. Dewilde:
A New Model for the High Level Description and Simulation of VLSI Networks. DAC 1989: 738-741 - [c12]A. C. Yilmaz, S. Hagestein, Ed F. Deprettere, Patrick M. Dewilde:
A Hardware Algorithm for Fast Realistic Image Synthesis. Advances in Computer Graphics Hardware 1989: 37-60 - 1988
- [j3]Peter Kroon, Ed F. Deprettere:
A class of analysis-by-synthesis predictive coders for high quality speech coding at rates between 4.8 and 16 kbit/s. IEEE J. Sel. Areas Commun. 6(2): 353-363 (1988) - [c11]Jichun Bu, Ed F. Deprettere:
Converting sequential iterative algorithms to recurrent equations for automatic design of systolic arrays. ICASSP 1988: 2025-2028 - [c10]Kishan Jainandunsing, Ed F. Deprettere:
Design of a Concurrent Computer for Solving Systems of Linear Equations. ISCA 1988: 204-211 - 1987
- [c9]Jichun Bu, Ed F. Deprettere:
A VLSI System Architecture for High-Speed Radiative Transfer 3D Image Synthesis. Eurographics 1987 - [c8]Caspar Horne, Ed F. Deprettere:
Multi-pulse and regular-pulse LP coding of images. ICASSP 1987: 1083-1086 - 1986
- [j2]Kishan Jainandunsing, Ed F. Deprettere:
Design and VLSI Implementation of a Concurrent Solver for N-Coupled Least-Squares Fitting Problems. IEEE J. Sel. Areas Commun. 4(1): 39-48 (1986) - [j1]Peter Kroon, Ed F. Deprettere, Robert J. Sluyter:
Regular-pulse excitation-A novel approach to effective and efficient multipulse coding of speech. IEEE Trans. Acoust. Speech Signal Process. 34(5): 1054-1063 (1986) - [c7]Peter Kroon, Robert J. Sluyter, Ed F. Deprettere:
A low complexity regular pulse coding scheme with a reduced transmission delay. ICASSP 1986: 3083-3086 - 1985
- [c6]Ed F. Deprettere, Kishan Jainandunsing:
Design and VLSI implementation of a concurrent solver for N coupled least-squares fitting problems. ICASSP 1985: 200-203 - [c5]Ed F. Deprettere, Peter Kroon:
Regular excitation reduction for effective and efficient LP-coding of speech. ICASSP 1985: 965-968 - 1984
- [c4]Ed F. Deprettere, Patrick M. Dewilde, R. Udo:
Pipelined cordic architectures for fast VLSI filtering and array processing. ICASSP 1984: 250-253 - [c3]Peter Kroon, Ed F. Deprettere:
Experimental evaluation of different approaches to the multi-pulse coder. ICASSP 1984: 396-399 - 1983
- [c2]Ed F. Deprettere:
Synthesis and fixed-point implementation of pipelined true orthogonal filters. ICASSP 1983: 217-220 - 1982
- [c1]Ed F. Deprettere:
Fast non-stationary lattice recursions for adaptive modeling and estimation. ICASSP 1982: 1721-1726
Coauthor Index
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-08-05 20:17 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint