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Diederik Verkest
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2020 – today
- 2023
- [j40]Pouya Houshmand
, Giuseppe Maria Sarda
, Vikram Jain
, Kodai Ueyoshi
, Ioannis A. Papistas
, Man Shi
, Qilin Zheng, Debjyoti Bhattacharjee
, Arindam Mallik, Peter Debacker
, Diederik Verkest, Marian Verhelst
:
DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge. IEEE J. Solid State Circuits 58(1): 203-215 (2023) - [c104]Subhali Subhechha, Stefan Cosemans, Attilio Belmonte, Nouredine Rassoul, Shamin Houshmand Sharifi, Peter Debacker, Diederik Verkest, Romain Delhougne, Gouri Sankar Kar:
Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays. IMW 2023: 1-4 - 2022
- [j39]Simei Yang
, Debjyoti Bhattacharjee
, Vinay B. Y. Kumar
, Saikat Chatterjee, Sayandip De, Peter Debacker
, Diederik Verkest, Arindam Mallik, Francky Catthoor:
AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 508-521 (2022) - [j38]Nathan Laubeuf
, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli
, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee
, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins:
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration. ACM Trans. Design Autom. Electr. Syst. 27(5): 46:1-46:21 (2022) - [c103]Michele Caselli, Subhali Subhechha, Peter Debacker, Arindam Mallik, Diederik Verkest:
Write-Verify Scheme for IGZO DRAM in Analog in-Memory Computing. ISCAS 2022: 1462-1466 - [c102]Michele Caselli, Debjyoti Bhattacharjee
, Arindam Mallik, Peter Debacker, Diederik Verkest:
Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation. ISCAS 2022: 1823-1827 - [c101]Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda
, Vikram Jain
, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee
, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
:
DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC 2022: 1-3 - 2021
- [c100]Ioannis A. Papistas, Stefan Cosemans, Bram Rooseleer, Jonas Doevenspeck, Myung Hee Na, Arindam Mallik, Peter Debacker
, Diederik Verkest:
A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm2 in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration. CICC 2021: 1-2 - [c99]Jonas Doevenspeck, Peter Vrancx, Nathan Laubeuf, Arindam Mallik, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene:
Noise tolerant ternary weight deep neural networks for analog in-memory inference. IJCNN 2021: 1-8 - [c98]Debjyoti Bhattacharjee
, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker
, Myung Hee Na, Diederik Verkest:
Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration. ISCAS 2021: 1-5 - [c97]Michele Caselli
, Ioannis A. Papistas, Stefan Cosemans, Arindam Mallik, Peter Debacker
, Diederik Verkest:
Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing. NEWCAS 2021: 1-4
2010 – 2019
- 2019
- [c96]Jonas Doevenspeck, Robin Degraeve, Andrea Fantini, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene:
Low Voltage Transient RESET Kinetic Modeling of OxRRAM for Neuromorphic Applications. IRPS 2019: 1-6 - [i1]Bram-Ernst Verhoef, Nathan Laubeuf, Stefan Cosemans, Peter Debacker, Ioannis A. Papistas, Arindam Mallik, Diederik Verkest:
FQ-Conv: Fully Quantized Convolution for Efficient and Accurate Inference. CoRR abs/1912.09356 (2019) - 2018
- [c95]Bertrand Parvais
, Geert Hellings, Marko Simicic
, Pieter Weckx, Jérôme Mitard, Doyoung Jang, V. Deshpande, B. van Liempc, Anabela Veloso, A. Vandooren, Niamh Waldron, Piet Wambacq, Nadine Collaert, Diederik Verkest:
Scaling CMOS beyond Si FinFET: an analog/RF perspective. ESSDERC 2018: 158-161 - 2017
- [j37]Trong Huynh Bao, Julien Ryckaert, Zsolt Tokei
, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq:
Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1669-1680 (2017) - [c94]Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Alessio Spessot, Diederik Verkest, Anda Mocuta:
SRAM designs for 5nm node and beyond: Opportunities and challenges. ICICDT 2017: 1-4 - 2016
- [c93]Bon Woong Ku, Peter Debacker, Dragomir Milojevic
, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim
:
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. ISLPED 2016: 76-81 - [c92]Praveen Raghavan, Marie Garcia Bardon, Peter Debacker, P. Schuddinck, Doyoung Jang, Rogier Baert, Diederik Verkest, Aaron Voon-Yew Thean:
5nm: Has the time for a device change come? ISQED 2016: 275-277 - 2015
- [c91]Bertrand Parvais
, Piet Wambacq, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Ken Sawada, Kazuki Nomoto, Tetsuya Oishi, Hiroaki Ammo:
A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS. A-SSCC 2015: 1-4 - [c90]Praveen Raghavan, Marie Garcia Bardon, Doyoung Jang, P. Schuddinck, Dmitry Yakimets, Julien Ryckaert, Abdelkarim Mercha, Naoto Horiguchi, Nadine Collaert, Anda Mocuta, Dan Mocuta, Zsolt Tokei
, Diederik Verkest, Aaron Thean, An Steegen:
Holisitic device exploration for 7nm node. CICC 2015: 1-5 - [c89]Pieter Weckx, Ben Kaczer, Praveen Raghavan, Jacopo Franco, Marko Simicic
, Philippe J. Roussel, Dimitri Linten, Aaron Thean, Diederik Verkest, Francky Catthoor, Guido Groeseneken
:
Characterization and simulation methodology for time-dependent variability in advanced technologies. CICC 2015: 1-8 - [c88]Ioannis Karageorgos, Michele Stucchi, Praveen Raghavan, Julien Ryckaert, Zsolt Tokei, Diederik Verkest, Rogier Baert, Sushil Sakhare, Wim Dehaene:
Impact of interconnect multiple-patterning variability on SRAMs. DATE 2015: 609-612 - [c87]Trong Huynh Bao
, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq:
Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM. ICICDT 2015: 1-4 - [c86]Marie Garcia Bardon, P. Schuddinck, Praveen Raghavan, Doyoung Jang, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Thean:
Dimensioning for power and performance under 10nm: The limits of FinFETs scaling. ICICDT 2015: 1-4 - [c85]Nathalie Fievet, Praveen Raghavan, Rogier Baert, Frédéric Robert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean:
Impact of device and interconnect process variability on clock distribution. ICICDT 2015: 1-4 - [c84]Kenichi Miyaguchi, Bertrand Parvais, Lars-Åke Ragnarsson, Piet Wambacq, Praveen Raghavan, Abdelkarim Mercha, Anda Mocuta, Diederik Verkest, Aaron Thean:
Modeling FinFET metal gate stack resistance for 14nm node and beyond. ICICDT 2015: 1-4 - [c83]Kazuyuki Tomida, Keizo Hiraga, Morin Dehan, Geert Hellings, Doyoung Jang, Kenichi Miyaguchi, Thomas Chiarella, Minsoo Kim, Anda Mocuta, Naoto Horiguchi, Abdelkarim Mercha, Diederik Verkest, Aaron Thean:
Impact of fin shape variability on device performance towards 10nm node. ICICDT 2015: 1-4 - [c82]Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer:
Lateral NWFET optimization for beyond 7nm nodes. ICICDT 2015: 1-4 - [c81]Raf Appeltans, Stefan Cosemans, Praveen Raghavan, Diederik Verkest, Liesbet Van der Perre
, Wim Dehaene:
STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance. NVMSA 2015: 1-6 - 2014
- [c80]Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, Mircea Dusa, Arindam Mallik, Sushil Sakhare, Boris Vandewalle, Piet Wambacq, Bharani Chava
, Kris Croes, Morin Dehan, Doyoung Jang, Philippe Leray, Tsung-Te Liu, Kenichi Miyaguchi, Bertrand Parvais, Pieter Schuddinck, Philippe Weemaes, Abdelkarim Mercha, Jürgen Bömmels, Naoto Horiguchi, Greg McIntyre, Aaron Thean, Zsolt Tökei, Shaunee Cheng, Diederik Verkest, An Steegen:
Design Technology co-optimization for N10. CICC 2014: 1-8 - [c79]Trong Huynh Bao
, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei
, Diederik Verkest, Aaron Thean, Piet Wambacq:
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC 2014: 102-105 - [c78]Odysseas Zografos, Praveen Raghavan, Luca Gaetano Amarù, Bart Soree
, Rudy Lauwereins, Iuliana P. Radu
, Diederik Verkest, Aaron Thean:
System-level assessment and area evaluation of Spin Wave logic circuits. NANOARCH 2014: 25-30 - 2013
- [c77]Dragomir Milojevic
, Pol Marchal, Erik Jan Marinissen
, Geert Van der Plas
, Diederik Verkest, Eric Beyne
:
Design issues in heterogeneous 3D/2.5D integration. ASP-DAC 2013: 403-410 - [c76]Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava
, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest:
TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes. DAC 2013: 24:1-24:6 - 2012
- [j36]Pavel Poliakov, Pieter Blomme, Alessandro Vaglio Pret, Miguel Corbalan Miranda, Roel Gronheid, Diederik Verkest, Jan Van Houdt, Wim Dehaene:
Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories. Microelectron. Reliab. 52(3): 525-529 (2012) - 2011
- [c75]Andrej Ivankovic, Geert Van der Plas
, V. Moroz, M. Choi, Vladimir Cherman, Abdelkarim Mercha, Paul Marchal, Marcel Gonzalez, Geert Eneman, Wenqi Zhang, Thibault Buisson, Mikael Detalle, Antonio La Manna, Diederik Verkest, Gerald Beyer, Eric Beyne
, Bart Vandevelde, Ingrid De Wolf, Dirk Vandepitte:
Analysis of microbump induced stress effects in 3D stacked IC technologies. 3DIC 2011: 1-5 - [c74]Lu Zhang, Ke Zhang, Tian Sheuan Chang
, Gauthier Lafruit, Georgi Krasimirov Kuzmanov, Diederik Verkest:
Real-time high-definition stereo matching on FPGA. FPGA 2011: 55-64 - 2010
- [j35]Pavel Poliakov, Ankur Anchlia, Marie Garcia Bardon, Bram Rooseleer, Bart De Wachter, Nadine Collaert, Koen van der Zanden, Wim Dehaene, Diederik Verkest, Miguel Corbalan Miranda:
Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM. IEEE Trans. Circuits Syst. II Express Briefs 57-II(3): 183-187 (2010) - [j34]Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest, Rudy Lauwereins, Thanos Stouraitis
:
Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements. ACM Trans. Embed. Comput. Syst. 9(3): 17:1-17:26 (2010) - [j33]Vincent Nollet, Diederik Verkest, Henk Corporaal:
A Safari Through the MPSoC Run-Time Management Jungle. J. Signal Process. Syst. 60(2): 251-268 (2010)
2000 – 2009
- 2009
- [j32]Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest:
EMPIRE: Empirical power/area/timing models for register files. Microprocess. Microsystems 33(4): 295-300 (2009) - [j31]Paul Marchal, Bruno Bougard, Guruprasad Katti, Michele Stucchi, Wim Dehaene, Antonis Papanikolaou, Diederik Verkest, Bart Swinnen, Eric Beyne
:
3-D Technology Assessment: Path-Finding the Technology/Design Sweet-Spot. Proc. IEEE 97(1): 96-107 (2009) - [j30]Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest:
Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures. IEEE Trans. Computers 58(3): 311-321 (2009) - [j29]Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest, Rudy Lauwereins, Thanos Stouraitis
:
Spatial locality exploitation for runtime reordering of JPEG2000 wavelet data layouts. ACM Trans. Design Autom. Electr. Syst. 15(1): 8:1-8:6 (2009) - [j28]Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Bingfeng Mei, Francky Catthoor, Diederik Verkest:
Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures. IEEE Trans. Very Large Scale Integr. Syst. 17(1): 151-155 (2009) - [j27]Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Spyridon Toulatos, Gauthier Lafruit, Thanos Stouraitis
, Rudy Lauwereins, Diederik Verkest:
Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments. J. Signal Process. Syst. 56(2-3): 125-139 (2009) - [j26]Dragomir Milojevic
, Luc J. M. Montperrus, Diederik Verkest:
Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications. J. Signal Process. Syst. 57(2): 139-153 (2009) - [j25]Bjorn De Sutter, Diederik Verkest, Erik Brockmeyer, Eric Delfosse, Arnout Vandecappelle, Jean-Yves Mignolet:
Design and Tool Flow of Multimedia MPSoC Platforms. J. Signal Process. Syst. 57(2): 229-247 (2009) - [c73]Diederik Verkest:
Multimedia systems in a changing technology landscape. ESTIMedia 2009: 1 - 2008
- [j24]David Atienza
, Praveen Raghavan, José Luis Ayala
, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
:
Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures. Integr. 41(1): 38-48 (2008) - [j23]Bruno Bougard, Bjorn De Sutter, Diederik Verkest, Liesbet Van der Perre
, Rudy Lauwereins:
A Coarse-Grained Array Accelerator for Software-Defined Radio Baseband Processing. IEEE Micro 28(4): 41-50 (2008) - [j22]Anthony Leroy
, Dragomir Milojevic
, Diederik Verkest, Frédéric Robert, Francky Catthoor:
Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip. IEEE Trans. Computers 57(9): 1182-1195 (2008) - [j21]Vincent Nollet, Prabhat Avasare, Hendrik Eeckhaut, Diederik Verkest, Henk Corporaal:
Run-Time Management of a MPSoC Containing FPGA Fabric Tiles. IEEE Trans. Very Large Scale Integr. Syst. 16(1): 24-33 (2008) - [c72]Praveen Raghavan, Andy Lambrechts, Javed Absar, Murali Jayapala, Francky Catthoor, Diederik Verkest:
Coffee: COmpiler Framework for Energy-Aware Exploration. HiPEAC 2008: 193-208 - [c71]Bert Geelen, Aris Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest:
Spatial locality trade-offs of wavelet-based applications in dynamic execution environments. ICASSP 2008: 1461-1464 - [c70]Mladen Berekovic
, Frank Bouwens, Tom Vander Aa, Diederik Verkest:
Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. PATMOS 2008: 449-457 - [c69]Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Diederik Verkest:
Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor. VLSI Design 2008: 201-207 - 2007
- [j20]Kristof Denolf, Marco Jan Gerrit Bekooij, Johan Cockx, Diederik Verkest, Henk Corporaal:
Exploiting the Expressiveness of Cyclo-Static Dataflow to Model Multimedia Implementations. EURASIP J. Adv. Signal Process. 2007 (2007) - [j19]Kristof Denolf, Adrian Chirila-Rus, Paul R. Schumacher, Robert D. Turney, Kees A. Vissers, Diederik Verkest, Henk Corporaal:
A Systematic Approach to Design Low-Power Video Codec Cores. EURASIP J. Embed. Syst. 2007 (2007) - [j18]José L. Ayala
, Marisa López-Vallejo
, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest:
Energy-aware compilation and hardware design for VLIW embedded systems. Int. J. Embed. Syst. 3(1/2): 73-82 (2007) - [c68]Praveen Raghavan, Satyakiran Munaga, Estela Rey Ramos, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest:
A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors. ARCS 2007: 57-68 - [c67]Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest, Henk Corporaal:
Very wide register: an asymmetric register file organization for low power embedded processors. DATE 2007: 1066-1071 - [c66]Vincent Nollet, Diederik Verkest, Henk Corporaal:
A Quick Safari Through the MPSoC Run-Time Management Jungle. ESTIMedia 2007: 41-46 - [c65]Vissarion Ferentinos, Bert Geelen, Francky Catthoor, Gauthier Lafruit, Thanos Stouraitis
, Rudy Lauwereins, Diederik Verkest:
Adaptive mapping to resource availability for dynamic wavelet-based applications. ESTIMedia 2007: 53-58 - [c64]Praveen Raghavan, Nandhavel Sethubalasubramanian, Satyakiran Munaga, Estela Rey Ramos, Murali Jayapala, Oliver Weiss, Francky Catthoor, Diederik Verkest:
Semi Custom Design: A Case Study on SIMD Shufflers. PATMOS 2007: 433-442 - 2006
- [c63]Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest:
Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors. DATE 2006: 339-344 - [c62]Vincent Nollet, Prabhat Avasare, Diederik Verkest, Henk Corporaal:
Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment. ERSA 2006: 49-55 - [c61]Daniele Paolo Scarpazza, Praveen Raghavan, David Novo, Francky Catthoor, Diederik Verkest:
Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level Parallelism. PATMOS 2006: 12-23 - [c60]David Atienza, Praveen Raghavan, José L. Ayala
, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
:
Compiler-Driven Leakage Energy Reduction in Banked Register Files. PATMOS 2006: 107-116 - [c59]Bert Geelen, Aris Ferentinos, Francky Catthoor, Arnout Vandecappelle, Gauthier Lafruit, Thanos Stouraitis
, Rudy Lauwereins, Diederik Verkest:
Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications. SiPS 2006: 362-367 - 2005
- [j17]Bingfeng Mei, Andy Lambrechts, Diederik Verkest, Jean-Yves Mignolet, Rudy Lauwereins:
Architecture Exploration for a Reconfigurable Architecture Template. IEEE Des. Test Comput. 22(2): 90-101 (2005) - [j16]Javier Resano
, Daniel Mozos, Diederik Verkest, Francky Catthoor:
A Reconfiguration Manager for Dynamically Reconfigurable Hardware. IEEE Des. Test Comput. 22(5): 452-460 (2005) - [c58]Andy Lambrechts, Praveen Raghavan, Anthony Leroy
, Guillermo Talavera
, Tom Vander Aa, Murali Jayapala, Francky Catthoor, Diederik Verkest, Geert Deconinck
, Henk Corporaal, Frédéric Robert, Jordi Carrabina
:
Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. ASAP 2005: 179-184 - [c57]Anthony Leroy, Paul Marchal, Adelina Shickova, Francky Catthoor, Frédéric Robert, Diederik Verkest:
Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs. CODES+ISSS 2005: 81-86 - [c56]Vincent Nollet, Prabhat Avasare, Jean-Yves Mignolet, Diederik Verkest:
Low Cost Task Migration Initiation in a Heterogeneous MP-SoC. DATE 2005: 252-253 - [c55]Prabhat Avasare, Vincent Nollet, Jean-Yves Mignolet, Diederik Verkest, Henk Corporaal:
Centralized end-to-end flow control in a best-effort network-on-chip. EMSOFT 2005: 17-20 - [c54]Richard Stahl, Francky Catthoor, Diederik Verkest:
Object-Distribution Analysis: Technique for Parallel Loop Distribution of Object-Oriented Programs. ICPP Workshops 2005: 153-160 - [c53]Richard Stahl, Francky Catthoor, Diederik Verkest:
Object-Distribution Analysis for Program Decomposition and Re-Clustering. IPDPS 2005 - [c52]Bert Geelen, Gauthier Lafruit, Vissarion Ferentinos, Rudy Lauwereins, Diederik Verkest:
Memory Hierarchy Energy Cost of a Direct Filtering Implementation of the Wavelet Transform. PATMOS 2005: 107-116 - [e2]Vassilis Paliouras, Johan Vounckx, Diederik Verkest:
Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings. Lecture Notes in Computer Science 3728, Springer 2005, ISBN 3-540-29013-3 [contents] - 2004
- [j15]Théodore Marescaux, Vincent Nollet, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Prabhat Avasare, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins:
Run-time support for heterogeneous multitasking on reconfigurable SoCs. Integr. 38(1): 107-130 (2004) - [j14]Javier Resano
, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs. Microprocess. Microsystems 28(5-6): 291-301 (2004) - [c51]Vincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde:
Operating-system controlled network on chip. DAC 2004: 256-259 - [c50]Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins:
Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study. DATE 2004: 1224-1229 - [c49]Richard Stahl, Francky Catthoor, Rudy Lauwereins, Diederik Verkest:
Design-Time Data-Access Analysis for Parallel Java Programs with Shared-Memory Communication Model. Euro-Par 2004: 206-213 - [c48]T. Andrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Frédéric Robert:
Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation. FPL 2004: 637-647 - [c47]Richard Stahl, Robert Pasko, Francky Catthoor, Rudy Lauwereins, Diederik Verkest:
High-Level Data-Access Analysis for Characterisation of (Sub)task-Level Parallelism in Java. HIPS 2004: 31-40 - [c46]Andy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera
, Anthony Leroy
, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck
, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll
:
Design Style Case Study for Embedded Multi Media Compute Nodes. RTSS 2004: 104-113 - 2003
- [j13]Theofanis Orphanoudakis, Stylianos Perissakis, Kostas Pramataris, Nikos A. Nikolaou, Nicholas Zervos, Matthias Steck, Christoph Baumhof, Diederik Verkest, Chantal Ykman-Couvreur, Gregory Doumenis
, Fotis Karoubalis, Ioanna Theologitou, Dionisios I. Reisis, George E. Konstantoulakis, Nikos Vogiatzis:
Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks. Telecommun. Syst. 23(3-4): 351-367 (2003) - [j12]Frederik Vermeulen, Francky Catthoor, Lode Nachtergaele, Diederik Verkest, Hugo De Man:
Power-efficient flexible processor architecture for embedded applications. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 376-385 (2003) - [c45]Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins:
Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. DATE 2003: 10296-10301 - [c44]Jean-Yves Mignolet, Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins:
Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip. DATE 2003: 10986-10993 - [c43]Vincent Nollet, Jean-Yves Mignolet, T. Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins:
Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems. Engineering of Reconfigurable Systems and Algorithms 2003: 81-87 - [c42]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems. ESTIMedia 2003: 156-162 - [c41]Javier Resano
, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms. FCCM 2003: 278-279 - [c40]Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins:
ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. FPL 2003: 61-70 - [c39]Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor:
Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. FPL 2003: 585-594 - [c38]Théodore Marescaux, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde, Rudy Lauwereins:
Networks on Chip as Hardware Components of an OS for Reconfigurable Systems. FPL 2003: 595-605 - [c37]Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins:
Designing an Operating System for a Heterogeneous Reconfigurable So. IPDPS 2003: 174 - [c36]T. Andrei Bartic, Jean-Yves Mignolet, Vincent Nollet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins:
Highly scalable network on chip for reconfigurable systems. SoC 2003: 79-82 - [c35]Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor:
Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. SCOPES 2003: 313-328 - [e1]Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest, Norbert Wehn:
Embedded Software for SoC. Kluwer / Springer 2003, ISBN 978-1-4020-7528-5 [contents] - 2002
- [j11]Chantal Ykman-Couvreur, Jurgen Lambrecht, Diederik Verkest, Francky Catthoor, Bengt Svantesson, Ahmed Hemani, F. Wolf:
Dynamic memory management methodology applied to embedded telecom network systems. IEEE Trans. Very Large Scale Integr. Syst. 10(5): 650-667 (2002) - [c34]Chantal Ykman-Couvreur, Jurgen Lambrecht, Diederik Verkest, Francky Catthoor, Aristides Nikologiannis, George E. Konstantoulakis:
System-level performance optimization of the data queueing memory management in high-speed network processors. DAC 2002: 518-523 - [c33]Steve Guccione, Diederik Verkest, Ivo Bolsens:
Design Technology for Networked Reconfigurable FPGA Platforms. DATE 2002: 994-997 - [c32]Théodore Marescaux, T. Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins:
Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs. FPL 2002: 795-805 - [c31]Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels
, Rudy Lauwereins, Hugo De Man:
Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications. FPL 2002: 1135-1138 - [c30]Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins:
DRESC: a retargetable compiler for coarse-grained reconfigurable architectures. FPT 2002: 166-173 - [c29]Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest:
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera. Embedded Processor Design Challenges 2002: 274-290 - 2001
- [j10]Peng Yang, Chun Wong, Paul Marchal, Francky Catthoor, Dirk Desmet, Diederik Verkest, Rudy Lauwereins:
Energy-Aware Runtime Scheduling for Embedded-Multiprocessor SOCs. IEEE Des. Test Comput. 18(5): 46-58 (2001) - [c28]Diederik Verkest, Wolfgang Eberle, Patrick Schaumont, Bert Gyselinckx, Serge Vemalde:
C++ based system design of a 72 Mb/s OFDM transceiver for wireless LAN. CICC 2001: 433-439 - [c27]Chun Wong, Paul Marchal, Peng Yang, Francky Catthoor, Hugo De Man, Aggeliki S. Prayati, Nathalie Cossement, Rudy Lauwereins, Diederik Verkest:
Task concurrency management methodology summary. DATE 2001: 813 - [c26]Diederik Verkest, Peng Yang, Chun Wong, Paul Marchal:
Optimisation Problems for Dynamic Concurrent Task-Based Systems. ICCAD 2001: 265- - [c25]Tycho van Meeuwen, Arnout Vandecappelle, Allert van Zelst, Francky Catthoor, Diederik Verkest:
System-level interconnect architecture exploration for custom memory organizations. ISSS 2001: 13-18 - [c24]Miguel Miranda, C. Ghez, Chidamber Kulkarni, Francky Catthoor, Diederik Verkest:
Systematic speed-power memory data-layout exploration for cache controlled embedded multimedia applications. ISSS 2001: 107-112 - 2000
- [j9]Frederik Vermeulen, Francky Catthoor, Diederik Verkest, Hugo De Man:
Formalized three-layer system-level model and reuse methodology for embedded data-dominated applications. IEEE Trans. Very Large Scale Integr. Syst. 8(2): 207-216 (2000) - [c23]Peng Yang, Dirk Desmet, Francky Catthoor, Diederik Verkest:
Dynamic scheduling of concurrent tasks with cost performance trade-off. CASES 2000: 103-109 - [c22]Frederik Vermeulen, Francky Catthoor, Diederik Verkest, Hugo De Man:
Extended design reuse trade-offs in hardware-software architecture mapping. CODES 2000: 103-107 - [c21]Dirk Desmet, Diederik Verkest, Hugo De Man:
Operating system based software generation for systems-on-chip. DAC 2000: 396-401 - [c20]Diederik Verkest, Joachim Kunkel, Frank Schirrmeister:
System Level Design Using C++. DATE 2000: 74-81 - [c19]Frederik Vermeulen, Francky Catthoor, Hugo De Man, Diederik Verkest:
Formalized Three-Layer System-Level Reuse Model and Methodology for Embedded Data-Dominated Applications. DATE 2000: 92-98 - [c18]Aggeliki S. Prayati, Chun Wong, Paul Marchal, Nathalie Cossement, Francky Catthoor, Rudy Lauwereins, Diederik Verkest, Hugo De Man, Alexios N. Birbas:
Task Concurrency Management Experiment for Power-Efficient Speed-up of Embedded MPEG4 IM1 Player. ICPP Workshops 2000: 453-460 - [c17]Frederik Vermeulen, Lode Nachtergaele, Francky Catthoor, Diederik Verkest, Hugo De Man:
Flexible hardware acceleration for multimedia oriented microprocessors. MICRO 2000: 171-177 - [c16]Paul Marchal, Chun Wong, Aggeliki S. Prayati, Nathalie Cossement, Francky Catthoor, Rudy Lauwereins, Diederik Verkest, Hugo De Man:
Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform. PACS 2000: 40-50
1990 – 1999
- 1999
- [j8]Gaetano Borriello, Diederik Verkest, Francky Catthoor:
Guest Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(1): 1-2 (1999) - [j7]Diederik Verkest, Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Kris Croes, Miguel Miranda, Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, Hugo De Man:
Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management. J. VLSI Signal Process. 21(3): 185-194 (1999) - [c15]Dirk Desmet, Michiel Esvelt, Prabhat Avasare, Diederik Verkest, Hugo De Man:
Timed executable system specification of an ADSL modem using a C++ based design environment: a case study. CODES 1999: 38-42 - [c14]Arnout Vandecappelle, Miguel Miranda, Erik Brockmeyer, Francky Catthoor, Diederik Verkest:
Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback. DAC 1999: 327-332 - [c13]Steven Vercauteren, Jan van der Steen, Diederik Verkest:
Combining Software Synthesis and Hardware/Software Interface Generation to Meet Hard Real-Time Constraints. DATE 1999: 556-561 - [c12]S. K. Tsasakou, Nikos S. Voros, M. V. Koziotis, Diederik Verkest, Aggeliki S. Prayati, Alexios N. Birbas:
Hardware-software co-design of embedded systems using CoWare's N2C methodology for application development. ICECS 1999: 59-62 - [c11]Chantal Ykman-Couvreur, Jurgen Lambrecht, Diederik Verkest, Francky Catthoor, Hugo De Man:
Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications. ISSS 1999: 85-93 - 1998
- [c10]Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Miguel Miranda, Kris Croes, Sven Wuytack, Gjalt G. de Jong, Francky Catthoor, Diederik Verkest, Paul Six, Hugo De Man:
Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer. DAC 1998: 76-81 - [c9]Steven Vercauteren, Diederik Verkest, Gjalt G. de Jong, Bill Lin:
Efficient Verification using Generalized Partial Order Analysis. DATE 1998: 782-789 - [c8]Julio Leao da Silva Jr., Francky Catthoor, Diederik Verkest, Hugo De Man:
Power exploration for dynamic data types through virtual memory management refinement. ISLPED 1998: 311-316 - [c7]Francky Catthoor, Diederik Verkest, Erik Brockmeyer:
Proposal for Unified System Design Meta Flow in Task-Level and Instruction-Level Design Technology Research for Multi-Media Applications. ISSS 1998: 89-95 - 1997
- [j6]Ivo Bolsens, Hugo J. De Man, Bill Lin, Karl van Rompaey, Steven Vercauteren, Diederik Verkest:
Hardware/software co-design of digital telecommunication systems. Proc. IEEE 85(3): 391-418 (1997) - [c6]Steven Vercauteren, Diederik Verkest, Gjalt G. de Jong, Bill Lin:
Derivation of Formal Representations from Process-Based Specification and Implementation Models. ISSS 1997: 16- - 1996
- [j5]Diederik Verkest, Karl van Rompaey, Ivo Bolsens, Hugo De Man:
CoWare - A design environment for heterogeneous hardware/software systems. Des. Autom. Embed. Syst. 1(4): 357-386 (1996) - [c5]Karl van Rompaey, Ivo Bolsens, Hugo De Man, Diederik Verkest:
CoWare - a design environment for heterogenous hardware/software systems. EURO-DAC 1996: 252-257 - 1994
- [j4]Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
A Proof of the Nonrestoring Division Algorithm and its Implementation on an ALU. Formal Methods Syst. Des. 4(1): 5-31 (1994) - 1993
- [j3]Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
On the Comparison of HOL and Boyer-Moore for Formal Hardware Verification. Formal Methods Syst. Des. 2(1): 45-72 (1993) - 1992
- [c4]Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
A Proof of the Non-Restoring Division Algorithm and its Implementation on the Cathedral-II ALU. Designing Correct Circuits 1992: 173-192 - [c3]Diederik Verkest, J. Vandenbergh, Luc J. M. Claesen, Hugo De Man:
A Description Methodology for Parameterized Modules in the Boyer-Moore Logic. TPCD 1992: 37-57 - 1991
- [c2]Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
Formal Hardware Verification in HOL and in Boyer-Moore: A Comparative Analysis. TPHOLs 1991: 340-347 - 1990
- [c1]Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment. EURO-DAC 1990: 62-66
1980 – 1989
- 1989
- [j2]Luc Claesen, R. T. Boute, J. De Man, W. Ploegaerts, M. Seutter, J. Vanslembrouck, Diederik Verkest:
Application of system semantics to VLSI for the transformational design of a parameterized booth multiplier module - a case study. Microprocessing and Microprogramming 27(1-5): 261-266 (1989) - [j1]W. Ploegaerts, Diederik Verkest, Luc Claesen, Hugo De Man:
Description and verification of more-dimensional regular and non-homogeneous structures using a functional hardware description language. Microprocessing and Microprogramming 27(1-5): 279-286 (1989)
Coauthor Index
aka: Hugo J. De Man
aka: Aaron Voon-Yew Thean
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