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Arthur Tuminaro

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2010 – 2019

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2010
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Rajiv V. Joshi, Rouwaida Kanj, Anthony Pelella, Arthur Tuminaro, Yuen H. Chan:
The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane. IEEE Des. Test Comput. 27(6): 36-45 (2010)

2000 – 2009

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2005
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Antonio Pelella, Arthur Tuminaro, Ryan T. Freese, Yuen H. Chan:
A 8Kb domino read SRAM with hit logic and parity checker. ESSCIRC 2005: 359-362

1990 – 1999

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1997
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Arthur Tuminaro:
A 400MHz, 144Kb CMOS ROM Macro for an IBM S/390-Class Microprocessor. ICCD 1997: 253-255

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