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Conference and Workshop Papers
- 2006
[c6]G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin:
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits. CHES 2006: 384-398- 2005
- [c5]G. Fraidy Bouesse, Marc Renaudin, Sophie Dumont, Fabien Germain:
DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement. DATE 2005: 424-429 - [c4]G. Fraidy Bouesse, Marc Renaudin, Adrien Witon, Fabien Germain:
A clock-less low-voltage AES crypto-processor. ESSCIRC 2005: 403-406 - [c3]G. Fraidy Bouesse, Marc Renaudin, Gilles Sicard:
Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals. VLSI-SoC 2005: 11-24 - 2004
- [c2]Marc Renaudin, G. Fraidy Bouesse, Ph. Proust, J. P. Tual, Laurent Sourgen, Fabien Germain:
High Security Smartcards. DATE 2004: 228-233 - 2003
- [c1]Philippe Maurine, Jean-Baptiste Rigaud
, G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin:
Statistic Implementation of QDI Asynchronous Primitives. PATMOS 2003: 181-191
Informal and Other Publications
- 2007
- [i1]G. Fraidy Bouesse, Marc Renaudin, Sophie Dumont, Fabien Germain:
DPA on quasi delay insensitive asynchronous circuits: formalization and improvement. CoRR abs/0710.3443 (2007)
Coauthor Index
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