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2010 – 2019
- 2017
[j7]Luc-André Grégoire, Handy Fortin-Blanchette, Jean Bélanger, Kamal Al-Haddad:
A Stability and Accuracy Validation Method for Multirate Digital Simulation. IEEE Trans. Ind. Informatics 13(2): 512-519 (2017)- 2016
- [j6]Christian Dufour, Sébastien Cense, Jean Bélanger:
An induction machine and power electronic test system on a field-programmable gate array. Math. Comput. Simul. 130: 112-123 (2016) - 2015
- [j5]Wei Li, Luc-André Grégoire, Jean Bélanger:
A Modular Multilevel Converter Pulse Generation and Capacitor Voltage Balance Method Optimized for FPGA Implementation. IEEE Trans. Ind. Electron. 62(5): 2859-2867 (2015) - [c9]Tarek Ould Bachir
, Asma Merdassi, Sébastien Cense, Handy Fortin-Blanchette, Jean Bélanger:
FPGA-based real-time simulation of a PSIM model: An indirect matrix converter case study. IECON 2015: 3336-3340 - 2014
- [c8]Luc-André Grégoire, Handy Fortin-Blanchette, Kamal Al-Haddad, Wei Li, Jean Bélanger:
Real-time simulation of modular multilevel converter on FPGA with sub-microsecond time-step. IECON 2014: 3797-3802 - [c7]Vahid Jalili-Marandi, Jean Bélanger, Fabio Jose Ayres:
Model-in-the-Loop real-time simulation in phasor domain. ISIE 2014: 2280-2284 - 2013
- [j4]Tarek Ould-Bachir, Christian Dufour, Jean Bélanger, Jean Mahseredjian, Jean-Pierre David:
A fully automated reconfigurable calculation engine dedicated to the real-time simulation of high switching frequency power electronic circuits. Math. Comput. Simul. 91: 167-177 (2013) - [c6]Can Wang, Wei Li, Jean Bélanger:
Real-time and faster-than-real-time simulation of Modular Multilevel Converters using standard multi-core CPU and FPGA chips. IECON 2013: 5405-5411 - [c5]Jean Bélanger, Amine Yamane, Andy Yen, Sébastien Cense, Pierre-Yves Robert:
Validation of eHS FPGA reconfigurable low-latency electric and power electronic circuit solver. IECON 2013: 5418-5423 - 2012
- [c4]Christian Dufour, Sébastien Cense, Tarek Ould-Bachir, Luc-André Grégoire, Jean Bélanger:
General-purpose reconfigurable low-latency electric circuit and motor drive solver on FPGA. IECON 2012: 3073-3081 - [c3]Tarek Ould-Bachir, Christian Dufour, Jean Bélanger, Jean Mahseredjian, Jean-Pierre David:
Effective floating-point calculation engines intended for the FPGA-based HIL simulation. ISIE 2012: 1363-1368 - [c2]Christian Dufour, Vahid Jalili-Marandi, Jean Bélanger:
Real-Time Simulation Using Transient Stability, ElectroMagnetic Transient and FPGA-Based High-Resolution Solvers. SC Companion 2012: 283-288 - 2010
- [j3]Wei Li, Géza Joós, Jean Bélanger:
Real-Time Simulation of a Wind Turbine Generator Coupled With a Battery Supercapacitor Energy Storage System. IEEE Trans. Ind. Electron. 57(4): 1137-1145 (2010)
2000 – 2009
- 2008
- [j2]Christian Dufour, Jean Bélanger, Vincent Lapointe:
FPGA-based Ultra-Low Latency HIL Fault Testing of a Permanent Magnet Motor Drive using RT-LAB-XSG. Simul. 84(2-3): 161-171 (2008) - 2004
- [c1]Christian Dufour, Jean Bélanger:
A PC-Based Real-Time Parallel Simulator of Electric Systems and Drives. PARELEC 2004: 105-113 - 2003
- [j1]Christian Dufour, Jean Bélanger, Simon Abourida:
Accurate simulation of a 6-pulse inverter with real-time event compensation in ARTEMISTM. Math. Comput. Simul. 63(3-5): 161-172 (2003)
Coauthor Index
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