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ORCIDStéphane Chevobbe
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2020 – today
- 2023
[j6]Maria Lepecq
, Thomas Dalgaty, William Fabre, Stéphane Chevobbe:
End-to-End Implementation of a Convolutional Neural Network on a 3D-Integrated Image Sensor with Macropixel Array. Sensors 23(4): 1909 (2023)- [i1]Quentin Picard, Stéphane Chevobbe, Mehdi Darouich, Jean-Yves Didier:
A survey on real-time 3D scene reconstruction with SLAM methods in embedded systems. CoRR abs/2309.05349 (2023) - 2022
- [c22]Quentin Picard, Stéphane Chevobbe, Mehdi Darouich, Zoe Mandelli, Mathieu Carrier, Jean-Yves Didier:
Work-in-Progress: Smart data reduction in SLAM methods for embedded systems. CASES 2022: 23-24 - [c21]Quentin Picard, Stéphane Chevobbe, Mehdi Darouich, Jean-Yves Didier:
Image Quantization Towards Data Reduction: Robustness Analysis for SLAM Methods On Embedded Platforms. ICIP 2022: 4158-4162
2010 – 2019
- 2019
- [j5]Laurent Millet, Stéphane Chevobbe, Caaliph Andriamisaina, Lamine Benaissa, Edouard Deschaseaux, Edith Beigné, Karim Ben Chehida, Maria Lepecq, Mehdi Darouich, Fabrice Guellec, Thomas Dombek, Marc Duranton:
A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing. IEEE J. Solid State Circuits 54(4): 1096-1105 (2019) - [c20]Pascal Vivet, Gilles Sicard, Laurent Millet, Stéphane Chevobbe, Karim Ben Chehida, Luis Angel Cubero, Monte Alegre, Maxence Bouvier, Alexandre Valentian, Maria Lepecq, Thomas Dombek, Olivier Bichler, Sébastien Thuries, Didier Lattard, Séverine Cheramy, Perrine Batude, Fabien Clermidy:
Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. DATE 2019: 674-679 - 2018
- [c19]Laurent Millet, Stéphane Chevobbe, Caaliph Andriamisaina, Edith Beigné, Fabrice Guellec, Thomas Dombek, Lamine Benaissa, Edouard Deschaseaux, Marc Duranton, K. Benchehida, Mehdi Darouich, Maria Lepecq:
A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing. VLSI Circuits 2018: 245-246 - 2015
- [c18]Pascal Cotret, Stéphane Chevobbe, Mehdi Darouich:
Embedded wavelet-based face recognition under variable position. Real-Time Image and Video Processing 2015: 94000A - 2013
- [j4]Sébastien Courroux, Stéphane Chevobbe, Mehdi Darouich, Michel Paindavoine:
Use of wavelet for image processing in smart cameras with low hardware resources. J. Syst. Archit. 59(10-A): 826-832 (2013) - [c17]Aziz Dziri, Stéphane Chevobbe, Mehdi Darouich:
Gesture recognition on smart cameras. Sensors, Cameras, and Systems for Industrial and Scientific Applications 2013: 86590L - [c16]Celine Azar, Stéphane Chevobbe, Yves Lhuillier, Jean-Philippe Diguet:
SNet, a flexible, scalable network paradigm for manycore architectures. NOCS 2013: 1-2 - 2012
- [j3]Erwan Raffin, Christophe Wolinski, François Charot, Emmanuel Casseau, Antoine Floch, Krzysztof Kuchcinski, Stéphane Chevobbe, Stéphane Guyetant:
Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture. Int. J. Embed. Real Time Commun. Syst. 3(1): 1-30 (2012) - 2011
- [c15]Valentin Gherman, J. Massas, Samuel Evain, Stéphane Chevobbe, Yannick Bonhomme:
Error prediction based on concurrent self-test and reduced slack time. DATE 2011: 1626-1631 - [c14]Celine Azar, Stéphane Chevobbe, Yves Lhuillier, Jean-Philippe Diguet:
Dynamic routing strategy for embedded distributed architectures. ICECS 2011: 653-656 - [c13]Charly Bechara, Aurelien Berhault, Nicolas Ventroux, Stéphane Chevobbe, Yves Lhuillier, Raphaël David, Daniel Etiemble:
A small footprint interleaved multithreaded processor for embedded systems. ICECS 2011: 685-690 - 2010
- [j2]Stéphane Chevobbe, Stéphane Guyetant, Mehdi Darouich:
Service de reconfiguration prédictif pour plateforme multicoeur hétérogène. Tech. Sci. Informatiques 29(2): 179-199 (2010) - [c12]Sébastien Courroux, Stéphane Guyetant, Stéphane Chevobbe, Michel Paindavoine:
A wavelet-based demosaicking algorithm for embedded applications. DASIP 2010: 90-96 - [c11]Erwan Raffin, Christophe Wolinski, François Charot, Krzysztof Kuchcinski, Stéphane Guyetant, Stéphane Chevobbe, Emmanuel Casseau:
Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture. DASIP 2010: 168-175 - [c10]Stéphane Chevobbe, Suresh Pajaniradja, Laurent Letellier:
Exploration platform of embedded simd architecture for autonomous retinas. DASIP 2010: 281-288 - [c9]Céline Azar, Maroun Ojail, Stéphane Chevobbe, Raphaël David:
CERA: A Channel Estimation Reconfigurable Architecture. ICT 2010: 957-964
2000 – 2009
- 2009
- [j1]Stéphane Chevobbe, Stéphane Guyetant:
Reducing Reconfiguration Overheads in Heterogeneous Multicore RSoCs with Predictive Configuration Management. Int. J. Reconfigurable Comput. 2009: 390167:1-390167:7 (2009) - [c8]Daniel Ménard, Emmanuel Casseau, Shafqat Khan, Olivier Sentieys, Stéphane Chevobbe, Stéphane Guyetant, Raphaël David:
Reconfigurable Operator Based Multimedia Embedded Processor. ARC 2009: 39-49 - [c7]Maroun Ojail, Raphaël David, Stéphane Chevobbe, Didier Demigny:
Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems. DSD 2009: 575-581 - [c6]Maroun Ojail, Raphaël David, Stéphane Chevobbe, Didier Demigny:
A reconfigurable FIR/FFT unit for wireless telecommunication systems. FPL 2009: 645-648 - [c5]Davide Rossi, Fabio Campi, Antonio Deledda, Claudio Mucci, Stefano Pucillo, Sean Whitty, Rolf Ernst, Stéphane Chevobbe, Stéphane Guyetant, Matthias Kühnle, Michael Hübner, Jürgen Becker, Wolfram Putzke-Röming:
A multi-core signal processor for heterogeneous reconfigurable computing. SoC 2009: 106-109 - 2006
- [c4]Stéphane Chevobbe, Raphaël David, Frédéric Blanc, Thierry Collette, Olivier Sentieys:
Control Unit for Parallel Embedded System. ReCoSoC 2006: 168-176 - 2004
- [c3]Nicolas Ventroux, Stéphane Chevobbe, Frédéric Blanc, Thierry Collette:
An Auto-adaptative Reconfigurable Architecture for the Control. Asia-Pacific Computer Systems Architecture Conference 2004: 72-87 - [c2]Eva Dokládalová, Stéphane Chevobbe, Frédéric Blanc:
Advances in Practical Implementation of the Digital Media Processing: Towards Reconfigurable Computation. EWIMT 2004 - [c1]Stéphane Chevobbe, Nicolas Ventroux, Frédéric Blanc, Thierry Collette:
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems. SAMOS 2004: 20-29
Coauthor Index
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