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ORCIDMukesh Agrawal 0001
Person information
- affiliation: Intel Corp., Hillsboro, OR, USA
- affiliation (PhD 2014): Duke University, Durham, NC, USA
Other persons with the same name
- Mukesh Agrawal — disambiguation page
- Mukesh Agrawal 0002 — Carnegie Mellon University, USA
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2010 – 2019
- 2017
[j7]Mainak Chaudhuri, Mukesh Agrawal, Jayesh Gaur, Sreenivas Subramoney
:
Micro-Sector Cache: Improving Space Utilization in Sectored DRAM Caches. ACM Trans. Archit. Code Optim. 14(1): 7:1-7:29 (2017)- 2016
- [j6]Mukesh Agrawal, Krishnendu Chakrabarty, Bill Eklow:
A Distributed, Reconfigurable, and Reusable BIST Infrastructure for Test and Diagnosis of 3-D-Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 309-322 (2016) - [c6]Ran Wang, Sergej Deutsch, Mukesh Agrawal, Krishnendu Chakrabarty:
The hype, myths, and realities of testing 3D integrated circuits. ICCAD 2016: 58 - 2015
- [j5]Mukesh Agrawal, Krishnendu Chakrabarty, Randy Widialaksono:
Reuse-Based Optimization for Prebond and Post-Bond Testing of 3-D-Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(1): 122-135 (2015) - [j4]Mukesh Agrawal, Krishnendu Chakrabarty:
Test-Cost Modeling and Optimal Test-Flow Selection of 3-D-Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9): 1523-1536 (2015) - 2014
- [b1]Mukesh Agrawal:
Optimization of Test and Design-for-Testability Solutions for Many-Core System-on-Chip Designs. Duke University, Durham, NC, USA, 2014 - [j3]Krishnendu Chakrabarty, Mukesh Agrawal, Sergej Deutsch, Brandon Noia, Ran Wang, Fangming Ye:
Test and Design-for-Testability Solutions for 3D Integrated Circuits. Inf. Media Technol. 9(4): 386-403 (2014) - [j2]Krishnendu Chakrabarty, Mukesh Agrawal, Sergej Deutsch, Brandon Noia, Ran Wang, Fangming Ye:
Test and Design-for-Testability Solutions for 3D Integrated Circuits. IPSJ Trans. Syst. LSI Des. Methodol. 7: 56-73 (2014) - [j1]Mukesh Agrawal, Michael Richter, Krishnendu Chakrabarty:
Test-Delivery Optimization in Manycore SOCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(7): 1067-1080 (2014) - [c5]Mukesh Agrawal, Krishnendu Chakrabarty, Bill Eklow:
A distributed, reconfigurable, and reusable bist infrastructure for 3D-stacked ICs. ITC 2014: 1-10 - [c4]Mukesh Agrawal, Krishnendu Chakrabarty:
Test-time optimization in NOC-based manycore SOCs using multicast routing. VTS 2014: 1-6 - 2013
- [c3]Mukesh Agrawal, Krishnendu Chakrabarty:
A graph-theoretic approach for minimizing the number of wrapper cells for pre-bond testing of 3D-stacked ICs. ITC 2013: 1-10 - [c2]Mukesh Agrawal, Krishnendu Chakrabarty:
Test-cost optimization and test-flow selection for 3D-stacked ICs. VTS 2013: 1-6 - 2012
- [c1]Mukesh Agrawal, Michael Richter, Krishnendu Chakrabarty:
A dynamic programming solution for optimizing test delivery in multicore SOCs. ITC 2012: 1-10
Coauthor Index
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