BibTeX records: Andrés David García García

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@inproceedings{DBLP:conf/reconfig/LozanoPG13,
  author       = {Pedro Cervantes Lozano and
                  Luis Fernando Gonz{\'{a}}lez P{\'{e}}rez and
                  Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a},
  title        = {A {VLSI} architecture for the {QR} decomposition based on the {MCGR}
                  algorithm},
  booktitle    = {2012 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2013, Cancun, Mexico, December 9-11, 2013},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ReConFig.2013.6732267},
  doi          = {10.1109/RECONFIG.2013.6732267},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/LozanoPG13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/LozanoPG12,
  author       = {Pedro Cervantes Lozano and
                  Luis Fernando Gonz{\'{a}}lez P{\'{e}}rez and
                  Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a},
  title        = {A {VLSI} architecture for the K-best Sphere-Decoder in {MIMO} systems},
  booktitle    = {2012 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2012, Cancun, Mexico, December 5-7, 2012},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ReConFig.2012.6416791},
  doi          = {10.1109/RECONFIG.2012.6416791},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/LozanoPG12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/LozanoGG11,
  author       = {Pedro Cervantes Lozano and
                  Luis Fernando Gonz{\'{a}}lez P{\'{e}}rez and
                  Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a},
  editor       = {Peter M. Athanas and
                  J{\"{u}}rgen Becker and
                  Ren{\'{e}} Cumplido},
  title        = {Analysis of Parallel Sorting Algorithms in K-best Sphere-Decoder Architectures
                  for {MIMO} Systems},
  booktitle    = {2011 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011},
  pages        = {321--326},
  publisher    = {{IEEE} Computer Society},
  year         = {2011},
  url          = {https://doi.org/10.1109/ReConFig.2011.13},
  doi          = {10.1109/RECONFIG.2011.13},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/LozanoGG11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/Pindter-MedinaPCGC10,
  author       = {J. Pindter{-}Medina and
                  Samuel Pichardo and
                  Laura Curiel and
                  Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a and
                  Jes{\'{u}}s Enrique Chong{-}Quero},
  editor       = {Viktor K. Prasanna and
                  J{\"{u}}rgen Becker and
                  Ren{\'{e}} Cumplido},
  title        = {Multi-channel Driving Systems for Therapeutic Applications Based-on
                  Focused Ultrasound},
  booktitle    = {ReConFig'10: 2010 International Conference on Reconfigurable Computing
                  and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings},
  pages        = {168--172},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/ReConFig.2010.81},
  doi          = {10.1109/RECONFIG.2010.81},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/Pindter-MedinaPCGC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/SalmeronGA06,
  author       = {Carlos E. Guti{\'{e}}rrez Salmeron and
                  Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a and
                  Reynaldo F{\'{e}}lix Acu{\~{n}}a},
  editor       = {Ren{\'{e}} Cumplido{-}Parra and
                  C{\'{e}}sar Torres{-}Huitzil and
                  Andr{\'{e}}s D. Garc{\'{\i}}a},
  title        = {Bio - Inspired {\&} Traditional Approaches to Obtain Fault Tolerance},
  booktitle    = {2006 {IEEE} International Conference on Reconfigurable Computing and
                  FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006},
  pages        = {122--129},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/RECONF.2006.307762},
  doi          = {10.1109/RECONF.2006.307762},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/SalmeronGA06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/Alba-RosanoG06,
  author       = {Marcos R. de Alba{-}Rosano and
                  Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a},
  editor       = {Ren{\'{e}} Cumplido{-}Parra and
                  C{\'{e}}sar Torres{-}Huitzil and
                  Andr{\'{e}}s D. Garc{\'{\i}}a},
  title        = {Measuring Leakage Power in Nanometer {CMOS} 6T-SRAM Cells},
  booktitle    = {2006 {IEEE} International Conference on Reconfigurable Computing and
                  FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006},
  pages        = {149--155},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/RECONF.2006.307765},
  doi          = {10.1109/RECONF.2006.307765},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/Alba-RosanoG06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/reconfig/2006,
  editor       = {Ren{\'{e}} Cumplido{-}Parra and
                  C{\'{e}}sar Torres{-}Huitzil and
                  Andr{\'{e}}s D. Garc{\'{\i}}a},
  title        = {2006 {IEEE} International Conference on Reconfigurable Computing and
                  FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/4099957/proceeding},
  isbn         = {1-4244-0690-0},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/2006.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/conielecomp/MarinGPV05,
  author       = {Roberto Ram{\'{\i}}rez Mar{\'{\i}}n and
                  Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a and
                  Luis Fernando Gonz{\'{a}}lez P{\'{e}}rez and
                  Javier Eduardo Gonz{\'{a}}lez Villarruel},
  title        = {Hardware Architecture of {MAP} Algorithm for Turbo Codes Implemented
                  in a {FPGA}},
  booktitle    = {15th International Conference on Electronics, Communications, and
                  Computers {(CONIELECOMP} 2005), 28 February 2005 - 2 March 2005, Puebla,
                  Mexico},
  pages        = {70--75},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/CONIEL.2005.44},
  doi          = {10.1109/CONIEL.2005.44},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/conielecomp/MarinGPV05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/conielecomp/PerezBGVA05,
  author       = {Luis Fernando Gonz{\'{a}}lez P{\'{e}}rez and
                  Emmanuel Boutillon and
                  Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a and
                  Javier Eduardo Gonz{\'{a}}lez Villarruel and
                  Reynaldo F{\'{e}}lix Acu{\~{n}}a},
  title        = {{VLSI} Architecture for the {M} Algorithm Suited for Detection and
                  Source Coding Applications},
  booktitle    = {15th International Conference on Electronics, Communications, and
                  Computers {(CONIELECOMP} 2005), 28 February 2005 - 2 March 2005, Puebla,
                  Mexico},
  pages        = {119--124},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/CONIEL.2005.69},
  doi          = {10.1109/CONIEL.2005.69},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/conielecomp/PerezBGVA05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/conielecomp/GarciaPA05,
  author       = {Andr{\'{e}}s David Garc{\'{\i}}a Garc{\'{\i}}a and
                  Luis Fernando Gonz{\'{a}}lez P{\'{e}}rez and
                  Reynaldo F{\'{e}}lix Acu{\~{n}}a},
  title        = {Power Consumption Management on FPGAs},
  booktitle    = {15th International Conference on Electronics, Communications, and
                  Computers {(CONIELECOMP} 2005), 28 February 2005 - 2 March 2005, Puebla,
                  Mexico},
  pages        = {240--245},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/CONIEL.2005.60},
  doi          = {10.1109/CONIEL.2005.60},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/conielecomp/GarciaPA05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/GarciaDB00,
  author       = {Andr{\'{e}}s D. Garc{\'{\i}}a and
                  Jean{-}Luc Danger and
                  Wayne P. Burleson},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Low power digital design in FPGAs (poster abstract): a study of pipeline
                  architectures implemented in a {FPGA} using a low supply voltage to
                  reduce power consumption},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {220},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329220},
  doi          = {10.1145/329166.329220},
  timestamp    = {Tue, 06 Nov 2018 16:58:22 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/GarciaDB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/GarciaBD00,
  author       = {Andr{\'{e}}s D. Garc{\'{\i}}a and
                  Wayne P. Burleson and
                  Jean{-}Luc Danger},
  title        = {Low power digital design in FPGAs: a study of pipeline architectures
                  implemented in a {FPGA} using a low supply voltage to reduce power
                  consumption},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
                  Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
                  May 2000, Proceedings},
  pages        = {561--564},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISCAS.2000.857496},
  doi          = {10.1109/ISCAS.2000.857496},
  timestamp    = {Fri, 13 Aug 2021 09:26:01 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/GarciaBD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpl/GarciaBD99,
  author       = {Andr{\'{e}}s D. Garc{\'{\i}}a and
                  Wayne P. Burleson and
                  Jean{-}Luc Danger},
  editor       = {Patrick Lysaght and
                  James Irvine and
                  Reiner W. Hartenstein},
  title        = {Power Modelling in Field Programmable Gate Arrays {(FPGA)}},
  booktitle    = {Field-Programmable Logic and Applications, 9th International Workshop,
                  FPL'99, Glasgow, UK, August 30 - September 1, 1999, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {1673},
  pages        = {396--404},
  publisher    = {Springer},
  year         = {1999},
  url          = {https://doi.org/10.1007/978-3-540-48302-1\_44},
  doi          = {10.1007/978-3-540-48302-1\_44},
  timestamp    = {Tue, 14 May 2019 10:00:48 +0200},
  biburl       = {https://dblp.org/rec/conf/fpl/GarciaBD99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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