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Jean-François Nezan
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2020 – today
- 2024
- [j21]Alexandre Honorat
, Mickaël Dardaillon
, Hugo Miomandre
, Jean-François Nezan
:
Automated Buffer Sizing of Dataflow Applications in a High-level Synthesis Workflow. ACM Trans. Reconfigurable Technol. Syst. 17(1): 8:1-8:26 (2024) - [c63]Flavie Durand de Gevigney, Julien Heulot, Eric Bazin, Jean-François Nezan, Mickaël Dardaillon, Slaheddine Aridhi:
A Highly Configurable Platform for Advanced PPG Analysis. DASIP 2024: 3-14 - [c62]Sunrise Wang
, Nicolas Gac
, Hugo Miomandre
, Jean-François Nezan
, Karol Desnos
, François Orieux
:
An Initial Framework for Prototyping Radio-Interferometric Imaging Pipelines. DASIP 2024: 56-67 - [c61]Joseph W. Faye, Naouel Haggui
, Florent Kermarrec, Kevin J. M. Martin
, Shuvra S. Bhattacharyya
, Jean-François Nezan
, Maxime Pelcat
:
Scratchy: A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming Applications. DASIP 2024: 68-79 - 2023
- [j20]Naouel Haggui
, Wassim Hamidouche, Fatma Belghith, Nouri Masmoudi, Jean-François Nezan:
OpenVVC Decoder Parameterized and Interfaced Synchronous Dataflow (PiSDF) Model: Tile Based Parallelism. J. Signal Process. Syst. 95(7): 895-907 (2023) - [c60]Ophélie Renaud, Dylan Gageot
, Karol Desnos
, Jean-François Nezan
:
SCAPE: HW-Aware Clustering of Dataflow Actors for Tunable Scheduling Complexity. DASIP 2023: 3-14 - [c59]Ophélie Renaud, Naouel Haggui, Karol Desnos, Jean-François Nezan:
Automated Clustering and Pipelining of Dataflow Actors for Controlled Scheduling Complexity. EUSIPCO 2023: 1698-1702 - 2022
- [j19]Naouel Haggui
, Fatma Belghith, Wassim Hamidouche, Nouri Masmoudi, Jean-François Nezan:
Multiple Transform Selection Concept Modeling and Implementation Using Dynamic and Parameterized Dataflow Graphs. J. Signal Process. Syst. 94(7): 709-720 (2022) - [c58]Hugo Miomandre
, Jean-François Nezan, Daniel Ménard:
Design Space Exploration for Memory-Oriented Approximate Computing Techniques. ASAP 2022: 122-125 - [c57]Alexandre Honorat
, Thomas Bourgoin, Hugo Miomandre
, Karol Desnos
, Daniel Ménard, Jean-François Nezan:
Influence of Dataflow Graph Moldable Parameters on Optimization Criteria. DASIP 2022: 83-95 - 2021
- [c56]Naouel Haggui, Fatma Belghith, Wassim Hamidouche, Nouri Masmoudi, Jean-François Nezan:
Multiple Transform Selection concept modeling and implementation using Interface Based SDF graphs. DASIP 2021: 60-67 - 2020
- [j18]Ahmed Kammoun
, Wassim Hamidouche
, Pierrick Philippe, Olivier Déforges
, Fatma Belghith, Nouri Masmoudi, Jean-François Nezan:
Forward-Inverse 2D Hardware Implementation of Approximate Transform Core for the VVC Standard. IEEE Trans. Circuits Syst. Video Technol. 30(11): 4340-4354 (2020) - [c55]Alexandre Honorat, Karol Desnos, Shuvra S. Bhattacharyya, Jean-François Nezan:
Scheduling of Synchronous Dataflow Graphs with Partially Periodic Real-Time Constraints. RTNS 2020: 22-33 - [c54]Alexandre Honorat, Karol Desnos, Mickaël Dardaillon
, Jean-François Nezan:
A Fast Heuristic to Pipeline SDF Graphs. SAMOS 2020: 139-151 - [c53]Hugo Miomandre
, Jean-François Nezan, Daniel Ménard, Adam Campbell, Anthony Griffin, Seth Hall, Andrew Ensor:
Approximate Buffers for Reducing Memory Requirements: Case Study on SKA. SiPS 2020: 1-6
2010 – 2019
- 2019
- [c52]Ahmed Kammoun, Wassim Hamidouche, Pierrick Philippe, Fatma Belghith, Nouri Massmoudi, Jean-François Nezan:
Hardware Acceleration of Approximate Transform Module for the Versatile Video Coding Standard. EUSIPCO 2019: 1-5 - [c51]Alexandre Honorat, Karol Desnos, Maxime Pelcat, Jean-François Nezan:
Modeling Nested for Loops with Explicit Parallelism in Synchronous DataFlow Graphs. SAMOS 2019: 269-280 - 2018
- [j17]Maxime Pelcat, Alexandre Mercat, Karol Desnos, Luca Maggiani, Yanzhou Liu, Julien Heulot, Jean-François Nezan, Wassim Hamidouche, Daniel Ménard, Shuvra S. Bhattacharyya:
Reproducible Evaluation of System Efficiency With a Model of Architecture: From Theory to Practice. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2050-2063 (2018) - [j16]Ahmed Kammoun
, Wassim Hamidouche
, Fatma Belghith, Jean-François Nezan
, Nouri Masmoudi:
Hardware Design and Implementation of Adaptive Multiple Transforms for the Versatile Video Coding Standard. IEEE Trans. Consumer Electron. 64(4): 424-432 (2018) - [c50]Ahmed Kammoun, S. Ben Jdidia, Fatma Belghith, Wassim Hamidouche, Jean-François Nezan, Nouri Masmoudi:
An optimized hardware implementation of 4-point adaptive multiple transform design for post-HEVC. ATSIP 2018: 1-6 - [c49]Hugo Miomandre
, Julien Hascoët, Karol Desnos, Kevin J. M. Martin, Benoît Dupont de Dinechin, Jean-François Nezan:
Embedded Runtime for Reconfigurable Dataflow Graphs on Manycore Architectures. PARMA-DITAM@HiPEAC 2018: 51-56 - [c48]Julien Hascoet, Benoît Dupont de Dinechin, Karol Desnos, Jean-François Nezan:
A Distributed Framework for Low-Latency OpenVX over the RDMA NoC of a Clustered Manycore. HPEC 2018: 1-7 - [c47]Nicolas Sourbier, Jean-François Nezan, Cyril Tasse, Julien Hascoet:
Optimization of Calibration Algorithms on a Manycore Embedded Platform. SiPS 2018: 164-169 - 2017
- [j15]Judicael Menant, Guillaume Gautier, Muriel Pressigout, Luce Morin, Jean-François Nezan:
An automatized method to parameterize embedded stereo matching algorithms. J. Syst. Archit. 80: 92-103 (2017) - [c46]Judicaël Menant, Jean-François Nezan, Luce Morin, Muriel Pressigout:
A comparison of stereo matching algorithms on multi-core Digital Signal Processor platform. 3D Image Processing, Measurement (3DIPM), and Applications 2017: 49-54 - [c45]Julien Hascoet, Karol Desnos, Jean-François Nezan, Benoît Dupont de Dinechin:
Hierarchical Dataflow Model for efficient programming of clustered manycore processors. ASAP 2017: 137-142 - [c44]Hamza Deroui, Karol Desnos, Jean-François Nezan, Alix Munier Kordon:
Throughput evaluation of DSP applications based on hierarchical dataflow models. ISCAS 2017: 1-4 - [c43]Hamza Deroui, Karol Desnos, Jean-François Nezan, Alix Munier Kordon:
Relaxed subgraph execution model for the throughput evaluation of IBSDF graphs. SAMOS 2017: 213-220 - [c42]Anas Jallouli, Fatma Belghith, Mohamed Ali Ben Ayed, Wassim Hamidouche, Jean-François Nezan, Nouri Masmoudi:
Statistical analysis of Post-HEVC encoded videos. SiPS 2017: 1-6 - 2016
- [j14]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
On Memory Reuse Between Inputs and Outputs of Dataflow Actors. ACM Trans. Embed. Comput. Syst. 15(2): 30:1-30:25 (2016) - [j13]Zheng Zhou, William Plishker, Shuvra S. Bhattacharyya
, Karol Desnos, Maxime Pelcat, Jean-François Nezan:
Scheduling of Parallelized Synchronous Dataflow Actors for Multicore Signal Processing. J. Signal Process. Syst. 83(3): 309-328 (2016) - [c41]Judicael Menant, Guillaume Gautier, Jean-François Nezan, Muriel Pressigout, Luce Morin:
A comparison of cost construction methods onto a C6678 platform for stereo matching. DASIP 2016: 208-214 - [c40]Trevor Gee, Patrice Delmas, Sylvain Joly, Valentin Baron, Rachel Ababou, Jean-François Nezan:
A dedicated lightweight binocular stereo system for real-time depth-map generation. DASIP 2016: 215-221 - [c39]Jean-François Nezan, Alexandre Mercat, Patrice Delmas, Georgy L. Gimel'farb:
Optimized Belief Propagation Algorithm onto Embedded Multi and Many-Core Systems for Stereo Matching. PDP 2016: 332-336 - [c38]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Distributed Memory Allocation Technique for Synchronous Dataflow Graphs. SiPS 2016: 45-50 - [c37]Maxime Pelcat, Karol Desnos, Luca Maggiani, Yanzhou Liu, Julien Heulot, Jean-François Nezan, Shuvra S. Bhattacharyya:
Models of Architecture: Reproducible Efficiency Evaluation for Signal Processing Systems. SiPS 2016: 121-126 - 2015
- [j12]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Memory Analysis and Optimized Allocation of Dataflow Applications on Shared-Memory MPSoCs - In-Depth Study of a Computer Vision Application. J. Signal Process. Syst. 80(1): 19-37 (2015) - [c36]Julien Hascoet, Jean-François Nezan, Andrew Ensor, Benoît Dupont de Dinechin:
Implementation of a Fast Fourier transform algorithm onto a manycore processor. DASIP 2015: 1-7 - [c35]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Buffer merging technique for minimizing memory footprints of Synchronous Dataflow specifications. ICASSP 2015: 1111-1115 - 2014
- [c34]Julien Heulot, Judicael Menant, Maxime Pelcat, Jean-François Nezan, Luce Morin, Muriel Pressigout, Slaheddine Aridhi:
Demonstrating a dataflow-based RTOS for heterogeneous MPSoC by means of a stereo matching application. DASIP 2014: 1-2 - [c33]Judicael Menant, Muriel Pressigout, Luce Morin, Jean-François Nezan:
Optimized fixed point implementation of a local stereo matching algorithm onto C66x DSP. DASIP 2014: 1-6 - [c32]Julien Heulot, Maxime Pelcat, Jean-François Nezan, Yaset Oliva, Slaheddine Aridhi, Shuvra S. Bhattacharyya
:
Just-in-time scheduling techniques for multicore signal processing systems. GlobalSIP 2014: 25-29 - [c31]Alexandre Mercat, Jean-François Nezan, Daniel Ménard, Jinglin Zhang:
Implementation of a Stereo Matching algorithm onto a Manycore Embedded System. ISCAS 2014: 1296-1299 - 2013
- [b2]Maxime Pelcat, Slaheddine Aridhi, Jonathan Piat, Jean-François Nezan:
Physical Layer Multi-Core Prototyping - A Dataflow-Based Approach for LTE eNodeB. Lecture Notes in Electrical Engineering 171, Springer 2013, ISBN 978-1-4471-4209-6, pp. 1-198 - [c30]Julien Heulot, Jani Boutellier
, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Applying the adaptive Hybrid Flow-Shop scheduling method to schedule a 3GPP LTE physical layer algorithm onto many-core digital signal processors. AHS 2013: 123-129 - [c29]Jinglin Zhang, Jean-François Nezan, Maxime Pelcat, Jean-Gabriel Cousin:
Real-time GPU-based local stereo matching method. DASIP 2013: 209-214 - [c28]Zheng Zhou, Karol Desnos, Maxime Pelcat, Jean-François Nezan, William Plishker, Shuvra S. Bhattacharyya:
Scheduling of parallelized synchronous dataflow actors. ISSoC 2013: 1-10 - [c27]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya
, Slaheddine Aridhi:
PiMM: Parameterized and Interfaced dataflow Meta-Model for MPSoCs runtime reconfiguration. ICSAMOS 2013: 41-48 - 2012
- [j11]Manel Hentati, Samya Elaoud, Yassine Aoudni
, Jean-François Nezan, Mohamed Abid:
An efficient Resource Management to optimize the placement of hardware task on FPGA in the RVC framework. Des. Autom. Embed. Syst. 16(4): 363-380 (2012) - [c26]Manel Hentati, Yassine Aoudni, Jean-François Nezan, Mohamed Abid:
A hierarchical implementation of Hadamard transform using RVC-CAL dataflow programming and dynamic partial reconfiguration. DASIP 2012: 1-7 - [c25]Julien Heulot, Karol Desnos, Jean-François Nezan, Maxime Pelcat, Mickaël Raulet, Hervé Yviquel, P.-L. Lagalaye, Jean-Christophe Le Lann:
An experimental toolchain based on high-level dataflow models of computation for heterogeneous MPSoC. DASIP 2012: 1-2 - [c24]Jinglin Zhang, Jean-François Nezan, Jean-Gabriel Cousin:
Implementation of Motion Estimation Based on Heterogeneous Parallel Computing System with OpenCL. HPCC-ICESS 2012: 41-45 - [c23]Jean-François Nezan, Nicolas Siret, Matthieu Wipliez, Francesca Palumbo
, Luigi Raffo
:
Multi-purpose systems: A novel dataflow-based generation and mapping strategy. ISCAS 2012: 3073-3076 - [c22]Jinglin Zhang, Jean-François Nezan, Jean-Gabriel Cousin, Erwan Raffin
:
Implementation of stereo matching using a high level compiler for parallel computing acceleration. IVCNZ 2012: 279-283 - [c21]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Memory bounds for the distributed execution of a hierarchical Synchronous Data-Flow graph. ICSAMOS 2012: 160-167 - 2011
- [j10]Matthieu Wipliez, Ghislain Roquier, Jean-François Nezan:
Software Code Generation for the RVC-CAL Language. J. Signal Process. Syst. 63(2): 203-213 (2011) - [c20]Nicolas Siret, Jean-François Nezan, Aimad Rhatay:
Design of a processor optimized for syntax parsing in video decoders. DASIP 2011: 35-43 - [c19]Manel Hentati, Yassine Aoudni
, Jean-François Nezan, Mohamed Abid, Olivier Déforges:
FPGA dynamic reconfiguration using the RVC technology: Inverse quantization case study. DASIP 2011: 108-114 - [c18]Yaset Oliva, Maxime Pelcat, Jean-François Nezan, Jean-Christophe Prévotet
, Slaheddine Aridhi:
Building a RTOS for MPSoC dataflow programming. SoC 2011: 143-146 - 2010
- [j9]Pengcheng Mu, Jean-François Nezan, Mickaël Raulet, Jean-Gabriel Cousin:
Advanced list scheduling heuristic for task scheduling with communication contention for parallel embedded systems. Sci. China Inf. Sci. 53(11): 2272-2286 (2010) - [c17]Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Adaptive multicore scheduling for the LTE uplink. AHS 2010: 36-43 - [c16]Nicolas Siret, Matthieu Wipliez, Jean-François Nezan, Aimad Rhatay:
Hardware code generation from dataflow programs. DASIP 2010: 113-120 - [c15]Nicolas Siret, Ismaïl Sabry, Jean-François Nezan, Mickaël Raulet:
A codesign synthesis from an MPEG-4 decoder dataflow description. ISCAS 2010: 1995-1998 - [c14]Marcus Barkowsky, Médéric Blestel, Mathieu Carnec, Adlen Ksentini, Patrick Le Callet, Gérard Madec, Raoul Monnier, Jean-François Nezan, Romuald Pépion, Yohann Pitrey, Jean-François Travers, Mickaël Raulet, Alain Untersee:
Overview of the SVC4QoE Project. MobiMedia 2010: 560-570
2000 – 2009
- 2009
- [b1]Jean-François Nezan:
Prototypage rapide d'applications de traitement des images sur systèmes embarqués. (Rapid prototyping of image processing applications on embedded systems). University of Rennes 1, France, 2009 - [j8]Maxime Pelcat, Jonathan Piat, Matthieu Wipliez, Slaheddine Aridhi, Jean-François Nezan:
An Open Framework for Rapid Prototyping of Signal Processing Applications. EURASIP J. Embed. Syst. 2009 (2009) - [j7]Fabrice Urban, Jean-François Nezan, Mickaël Raulet:
HDS, a real-time multi-DSP motion estimator for MPEG-4 H.264 AVC high definition video encoding. J. Real Time Image Process. 4(1): 23-31 (2009) - [j6]Ihab Amer, Christophe Lucarz, Ghislain Roquier, Marco Mattavelli, Mickaël Raulet
, Jean-François Nezan, Olivier Déforges:
Reconfigurable video coding on multicore. IEEE Signal Process. Mag. 26(6): 113-123 (2009) - [c13]Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi, Jean-François Nezan:
Scalable compile-time scheduler for multi-core architectures. DATE 2009: 1552-1555 - 2008
- [j5]Fabrice Urban, Ronan Poullaouec, Jean-François Nezan, Olivier Déforges:
A Flexible Heterogeneous Hardware/Software Solution for Real-Time HD H.264 Motion Estimation. IEEE Trans. Circuits Syst. Video Technol. 18(12): 1781-1785 (2008) - [c12]Ghislain Roquier, Matthieu Wipliez, Mickaël Raulet, Jean-François Nezan, Olivier Déforges:
Software synthesis of CAL actors for the MPEG reconfigurable Video Coding framework. ICIP 2008: 1408-1411 - [c11]Matthieu Wipliez, Ghislain Roquier, Mickaël Raulet
, Jean-François Nezan, Olivier Déforges:
Code generation for the MPEG Reconfigurable Video Coding framework: From CAL actions to C functions. ICME 2008: 1049-1052 - [i1]Maxime Pelcat, Slaheddine Aridhi, Jean-François Nezan:
Optimization of automatically generated multi-core code for the LTE RACH-PD algorithm. CoRR abs/0811.0582 (2008) - 2007
- [c10]Fabrice Urban, Ronan Poullaouec, Jean-François Nezan, Olivier Déforges:
H.264 fractional motion estimation refinement: A real-time and low complexity hardware solution forhd sequences. EUSIPCO 2007: 836-840 - [c9]Pengcheng Mu, Mickaël Raulet, Jean-François Nezan, Jean-Gabriel Cousin:
Automatic code generation for multi-microblaze system with syndex. EUSIPCO 2007: 1644-1648 - 2006
- [j4]Mickaël Raulet, Fabrice Urban, Jean-François Nezan, Christophe Moy
, Olivier Déforges, Yves Sorel:
Rapid Prototyping for Heterogeneous Multicomponent Systems: An MPEG-4 Stream over a UMTS Communication Link. EURASIP J. Adv. Signal Process. 2006 (2006) - [j3]Markus Rupp, Thomas Kaiser, Jean-François Nezan, Gerhard Schmidt:
Signal Processing with High Complexity: Prototyping and Industrial Design. EURASIP J. Embed. Syst. 2006 (2006) - [c8]Ghislain Roquier, Mickaël Raulet, Jean-François Nezan, Olivier Déforges:
Using RTOS in the AAA methodology automatic executive generation. EUSIPCO 2006: 1-5 - [c7]Fabrice Urban, Mickaël Raulet, Jean-François Nezan, Olivier Déforges:
Automatic dsp cache memory management and fast prototyping for multiprocessor image applications. EUSIPCO 2006: 1-5 - 2005
- [c6]Mickaël Raulet, Christophe Moy, Fabrice Urban, Jean-François Nezan, Olivier Déforges:
SynDEx executive kernels for fast developments of applications over heterogeneous architectures. EUSIPCO 2005: 1-4 - 2004
- [j2]Jean-François Nezan, Olivier Déforges, Mickaël Raulet:
Fast Prototyping Methodology for Distributed and Heterogeneous Architectures: Application to Mpeg-4 Video Tools. Des. Autom. Embed. Syst. 9(2): 141-154 (2004) - 2003
- [c5]Nicolas Ventroux, Jean-François Nezan, Mickaël Raulet, Olivier Déforges:
Rapid prototyping for an optimized MPEG-4 decoder implementation over a parallel heterogenous architecture. ICASSP (2) 2003: 433-436 - [c4]Nicolas Ventroux, Jean-François Nezan, Mickaël Raulet, Olivier Déforges:
Rapid prototyping for an optimized MPEG4 decoder implementation over a parallel heterogeneous architecture. ICME 2003: 417-420 - 2002
- [j1]Virginie Fresse, Olivier Déforges, Jean-François Nezan:
AVSynDEx: A Rapid Prototyping Process Dedicated to the Implementation of Digital Image Processing Applications on Multi-DSP and FPGA Architectures. EURASIP J. Adv. Signal Process. 2002(9): 990-1002 (2002) - [c3]Yann Le Mener, Mickaël Raulet, Jean-François Nezan, Apostolos A. Kountouris, Christophe Moy:
Syndex executive kernel development for DSPs TI C6X applied to real-time and embedded multiprocessors architectures. EUSIPCO 2002: 1-4 - [c2]Jean-François Nezan, Virginie Fresse, Olivier Déforges, Mickaël Raulet:
A VsynDEx Methodology for Fast Prototyping of Multi-C6x DSP Architectures. PDPTA 2002: 1507-1513 - [c1]Jean-François Nezan, Olivier Déforges, Mickaël Raulet:
Rapid prototyping methodology for multi-DSP TI C6X platforms applied to an Mpeg-2 coding application. SPAA 2002: 147-148
Coauthor Index
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