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Amir Nahir
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2010 – 2019
- 2017
- [j9]Wisam Kadry, Dmitry Krestyashyn, Arkadiy Morgenshtein
, Amir Nahir, Vitali Sokhin, Jin Sung Park, Sung-Boem Park, Wookyeong Jeong, Jae-Cheol Son:
Test Generation Methods for Utilization Improvement of Hardware-Accelerated Simulation Platforms. IEEE Des. Test 34(1): 65-76 (2017) - 2016
- [j8]Amir Nahir, Ariel Orda, Danny Raz:
Replication-Based Load Balancing. IEEE Trans. Parallel Distributed Syst. 27(2): 494-507 (2016) - [c30]Amir Nahir, Ariel Orda, Danny Raz:
Reversing the supermarket: A distributed approach for handling elasticity in the cloud. NOMS 2016: 87-95 - 2015
- [j7]Manoj Dusanapudi, S. Fields, Michael S. Floyd, Guy L. Guthrie, Ronald N. Kalla, Shakti Kapoor, L. S. Leitner, Charles F. Marino, Joseph McGill, Amir Nahir, Kevin Reick, H. Shen, K. L. Wright:
Debugging post-silicon fails in the IBM POWER8 bring-up lab. IBM J. Res. Dev. 59(1) (2015) - [j6]Klaus-Dieter Schubert, John M. Ludden, Salma Ayub, J. Behrend, Bishop Brock, Fady Copty, S. M. German, Oz Hershkovitz, H. Horbach, Jonathan R. Jackson, K. Keuerleber, J. Koesters, L. S. Leitner, G. B. Meil, Charles Meissner, Ronny Morad, Amir Nahir, Viresh Paruthi, Richard D. Peterson, Randall R. Pratt, Michal Rimon, John Schumann:
Solutions to IBM POWER8 verification challenges. IBM J. Res. Dev. 59(1) (2015) - [j5]Amir Nahir, Ariel Orda, Danny Raz:
Workload Factoring: A Game-Theoretic Perspective. IEEE/ACM Trans. Netw. 23(6): 1998-2009 (2015) - [c29]Wisam Kadry, Dmitry Krestyashyn, Arkadiy Morgenshtein, Amir Nahir, Vitali Sokhin, Jin Sung Park, Sung-Boem Park, Wookyeong Jeong, Jae-Cheol Son:
Comparative study of test generation methods for simulation accelerators. DATE 2015: 321-324 - [c28]Amir Nahir, Ariel Orda, Danny Raz:
Resource allocation and management in Cloud Computing. IM 2015: 1078-1084 - 2014
- [b1]Amir Nahir:
Design and management of complex distributed systems: optimization and game-theoretic perspectives. Technion - Israel Institute of Technology, Israel, 2014 - [j4]Amir Nahir, Ariel Orda, Ari Freund:
Topology Design of Communication Networks: A Game-Theoretic Perspective. IEEE/ACM Trans. Netw. 22(2): 405-414 (2014) - [c27]Amir Nahir, Manoj Dusanapudi, Shakti Kapoor, Kevin Reick, Wolfgang Roesner, Klaus-Dieter Schubert, Keith Sharp, Greg Wetli:
Post-Silicon Validation of the IBM POWER8 Processor. DAC 2014: 56:1-56:6 - [c26]Allon Adir, Dave Goodman, Daniel Hershcovich, Oz Hershkovitz, Bryan G. Hickerson, Karen Holtz, Wisam Kadry, Anatoly Koyfman, John M. Ludden, Charles Meissner, Amir Nahir, Randall R. Pratt, Mike Schiffli, Brett St. Onge, Brian W. Thompto, Elena Tsanko, Avi Ziv:
Verification of Transactional Memory in POWER8. DAC 2014: 58:1-58:6 - [c25]Ophir Friedler, Wisam Kadry, Arkadiy Morgenshtein, Amir Nahir, Vitali Sokhin:
Effective post-silicon failure localization using dynamic program slicing. DATE 2014: 1-6 - 2013
- [c24]Wisam Kadry, Anatoly Koyfman, Dmitry Krestyashyn, Shimon Landa, Amir Nahir, Vitali Sokhin:
Improving Post-silicon Validation Efficiency by Using Pre-generated Data. Haifa Verification Conference 2013: 166-181 - [c23]Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco:
Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms. ICCAD 2013: 311-317 - [c22]Amir Nahir, Ariel Orda, Danny Raz:
Schedule first, manage later: Network-aware load balancing. INFOCOM 2013: 510-514 - [c21]Kanad Basu, Prabhat Mishra
, Priyadarsan Patra
, Amir Nahir, Allon Adir:
Dynamic Selection of Trace Signals for Post-Silicon Debug. MTV 2013: 62-67 - [e1]Armin Biere, Amir Nahir, Tanja E. J. Vos:
Hardware and Software: Verification and Testing - 8th International Haifa Verification Conference, HVC 2012, Haifa, Israel, November 6-8, 2012. Revised Selected Papers. Lecture Notes in Computer Science 7857, Springer 2013, ISBN 978-3-642-39610-6 [contents] - 2012
- [j3]Allon Adir, Amir Nahir, Avi Ziv:
Concurrent Generation of Concurrent Programs for Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1297-1302 (2012) - [c20]Amir Nahir, Avi Ziv, Subrat Panda:
Optimizing test-generation to the execution platform. ASP-DAC 2012: 304-309 - [c19]Flavio M. de Paula, Alan J. Hu, Amir Nahir:
nuTAB-BackSpace: Rewriting to Normalize Non-determinism in Post-silicon Debug Traces. CAV 2012: 513-531 - [c18]Amir Nahir, Ariel Orda, Danny Raz:
Distributed oblivious load balancing using prioritized job replication. CNSM 2012: 55-63 - [c17]Biruk Mammo, Debapriya Chatterjee, Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad, Valeria Bertacco:
Approximating checkers for simulation acceleration. DATE 2012: 153-158 - [c16]Kyle Balston, Alan J. Hu, Steven J. E. Wilton, Amir Nahir:
Emulation in post-silicon validation: It's not just for functionality anymore. HLDVT 2012: 110-117 - [c15]John Paul, Elena Guralnik, Anatoly Koyfman, Amir Nahir, Subrat Panda:
Leveraging Accelerated Simulation for Floating-Point Regression. Haifa Verification Conference 2012: 118-131 - [c14]Amir Nahir, Ariel Orda, Danny Raz:
Workload factoring with the cloud: A game-theoretic perspective. INFOCOM 2012: 2566-2570 - 2011
- [c13]Flavio M. de Paula, Amir Nahir, Ziv Nevo, Avigail Orni, Alan J. Hu:
TAB-BackSpace: unlimited-length trace buffers with zero additional on-chip overhead. DAC 2011: 411-416 - [c12]Allon Adir, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann:
Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor. DAC 2011: 569-574 - [c11]Allon Adir, Maxim Golubev, Shimon Landa, Amir Nahir, Gil Shurek, Vitali Sokhin, Avi Ziv:
Threadmill: a post-silicon exerciser for multi-threaded processors. DAC 2011: 860-865 - [c10]Allon Adir, Shady Copty, Shimon Landa, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann:
A unified methodology for pre-silicon verification and post-silicon validation. DATE 2011: 1590-1595 - 2010
- [j2]David Breitgand
, Rami Cohen, Amir Nahir, Danny Raz:
On cost-aware monitoring for self-adaptive load sharing. IEEE J. Sel. Areas Commun. 28(1): 70-83 (2010) - [c9]Amir Nahir, Avi Ziv, Rajesh Galivanche, Alan J. Hu, Miron Abramovici, Albert Camilleri, Bob Bentley, Harry Foster, Valeria Bertacco, Shakti Kapoor:
Bridging pre-silicon verification and post-silicon validation. DAC 2010: 94-95 - [c8]Allon Adir, Amir Nahir, Avi Ziv, Charles Meissner, John Schumann:
Reaching Coverage Closure in Post-silicon Validation. Haifa Verification Conference 2010: 60-75
2000 – 2009
- 2009
- [j1]Cindy Eisner, Amir Nahir, Karen Yorav:
Functional verification of power gated designs by compositional reasoning. Formal Methods Syst. Des. 35(1): 40-55 (2009) - [c7]Amir Nahir, Ariel Orda, Ari Freund:
Topology Design and Control: A Game-Theoretic Perspective. INFOCOM 2009: 1620-1628 - 2008
- [c6]Cindy Eisner, Amir Nahir, Karen Yorav:
Functional Verification of Power Gated Designs by Compositional Reasoning. CAV 2008: 433-445 - 2007
- [c5]David Breitgand
, Rami Cohen, Amir Nahir, Danny Raz:
On Fully Distributed Adaptive Load Balancing. DSOM 2007: 74-85 - [c4]David Breitgand
, Rami Cohen, Amir Nahir, Danny Raz:
Using the Right Amount of Monitoring in Adaptive Load Sharing. ICAC 2007: 7 - [c3]David Breitgand
, Rami Cohen, Amir Nahir, Danny Raz:
Cost Aware Adaptive Load Sharing. IWSOS 2007: 208-224 - 2006
- [c2]Amir Nahir, Avi Ziv, Roy Emek, Tal Keidar, Nir Ronen:
Scheduling-based test-case generation for verification of multimedia SoCs. DAC 2006: 348-351 - [c1]Amir Nahir, Yossi Shiloach, Avi Ziv:
Using Linear Programming Techniques for Scheduling-Based Random Test-Case Generation. Haifa Verification Conference 2006: 16-33
Coauthor Index
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