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ORCIDMau-Chung Frank Chang
M.-C. Frank Chang – M. Frank Chang
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- affiliation: University of California, Los Angeles, USA
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2020 – today
- 2025
[c80]Michael Lo
, Mau-Chung Frank Chang, Jason Cong:
SAT-Accel: A Modern SAT Solver on a FPGA. FPGA 2025: 234-246- 2024
- [c79]Christopher Chen, Yan Zhang, Hao-Yu Chien, Jiazhang Song, Jia Zhou, Chao-Jen Tien, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang:
A Sub-Sampling 35GHz PLL in 45nm PDSOI BiCMOS with 37fs Integrated Jitter and a FoM of -252dB. BCICTS 2024: 203-206 - [c78]Runzhou Chen, Hamdi Mani, Phil Marsh, Richard Al Hadi, Pragya Shrestha, Jason P. Campbell, Christopher Chen, Hao-Yu Chien, Mau-Chung Frank Chang:
A 0.16-3.7GHz Ultra-Compact Noise-Canceling Cryogenic Low-Noise Amplifier at 4 K using 16nm FinFET Technology for Qubit Readout. DRC 2024: 1-2 - [c77]Chi-Cheng Lai, Yu-Wen Chiu, I-Hsiang Wang, Ting Tsai, Jhih-Wei Chen, Yen-Hsiang Wang, Mau-Chung Frank Chang, Horng-Chih Lin, Pei-Wen Li:
Photon-Mediated Charge Transport and Stability of Physically-Defined and Self-Organized Germanium Quantum Dots/SON Barriers in Few-Hole Regime at T>10K. VLSI Technology and Circuits 2024: 1-2 - [i5]Boxun Yan, Bundel Pooja, Chi-Hou Chan, Mau-Chung Frank Chang:
Multiphysics Modeling on Photoconductive Antennas for Terahertz Applications. CoRR abs/2407.18465 (2024) - 2023
- [j73]Adrian Tang, Subash Khanal, Gabriel Virbila, Nathaniel J. Livesey, Frank Werner, Goutam Chattopadhyay, Mau-Chung Frank Chang:
A 2.0 GS/s Two-Stage Quad-Channel Digital Downconverter for a 380 GHz Spaceborne Atmospheric HO Monitoring Instrument. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 21-25 (2023) - [j72]Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong:
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs. IEEE Trans. Emerg. Top. Comput. 11(2): 404-419 (2023) - [c76]Shea Smith, Taylor Barton, Yen-Cheng Kuan, Armin Tajalli, Mau-Chung Frank Chang, Shiuh-Hua Wood Chiang:
A 0.12-V 200-Hz-BW 10-Bit ADC Using Quad-Channel VCO and Interpolation Linearization. A-SSCC 2023: 1-3 - [c75]Michael Lo, Young-kyu Choi, Weikang Qiao, Mau-Chung Frank Chang, Jason Cong:
HMLib: Efficient Data Transfer for HLS Using Host Memory. FPGA 2023: 50 - [c74]H.-L. Chiang, Richard A. Hadi, J.-F. Wang, Hung-Chi Han, J.-J. Wu, H.-H. Hsieh, J.-J. Horng, W.-S. Chou, B.-S. Lien, C.-H. Chang, Y.-C. Chen, Yeong-Her Wang, T.-C. Chen, J.-C. Liu, Y.-C. Liu, Meng-Hsueh Chiang, K.-H. Kao, B. Pulicherla, J. Cai, C.-S. Chang, K.-W. Su, K.-L. Cheng, T.-J. Yeh, Y.-C. Peng, Christian C. Enz, Mau-Chung Frank Chang, M.-F. Chang, H.-S. Philip Wong, Iuliana P. Radu:
How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS Technology. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c73]Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong:
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs. FCCM 2022: 1 - [c72]Jiazhang Song, Li-Yang Chen, Mau-Chung Frank Chang, Sudhakar Pamarti, Chih-Kong Ken Yang:
A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input. ISCAS 2022: 2047-2051 - [i4]Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong:
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs. CoRR abs/2205.07991 (2022) - 2021
- [j71]Eric Swindlehurst, Hunter Jensen, Alexander Petrie, Yixin Song, Yen-Cheng Kuan, Yong Qu, Mau-Chung Frank Chang, Jieh-Tsorng Wu, Shiuh-Hua Wood Chiang:
An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch. IEEE J. Solid State Circuits 56(8): 2347-2359 (2021) - [j70]Adrian Tang, Rulin Huang, Gabriel Virbila, Mau-Chung Frank Chang:
Self-Synchronized DS/SS With High Spread Factors for Robust Millimeter-Wave Datalinks. IEEE Trans. Circuits Syst. I Regul. Pap. 68(9): 3941-3950 (2021) - [c71]Yan Zhang, Chia-Jen Liang, Christopher Chen, Andrew Liu, Jason Woo, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang:
A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOS. ESSCIRC 2021: 435-438 - [c70]Weikang Qiao, Jihun Oh, Licheng Guo, Mau-Chung Frank Chang, Jason Cong:
FANS: FPGA-Accelerated Near-Storage Sorting. FCCM 2021: 106-114 - [c69]Yang Xiao, Wuyu Fan, Yuan Du, Li Du, Mau-Chung Frank Chang:
CTT-based Non-Volatile Deep Neural Network Accelerator Design. ISOCC 2021: 258-259 - 2020
- [j69]Kai-Ten Feng, Li-Hsiang Shen, Chi-Yu Li, Po-Tsang Huang, Sau-Hsuan Wu, Li-Chun Wang, Yi-Bing Lin, Mau-Chung Frank Chang:
3D On-Demand Flying Mobile Communication for Millimeter-Wave Heterogeneous Networks. IEEE Netw. 34(5): 198-204 (2020) - [j68]Li Du, Yuan Du, Mau-Chung Frank Chang:
A Reconfigurable 64-Dimension K-Means Clustering Accelerator With Adaptive Overflow Control. IEEE Trans. Circuits Syst. II Express Briefs 67-II(4): 760-764 (2020) - [c68]Shilei Hao, Yiwu Tang, Xuan Ding, Li Du, Yuan Du, Adrian Tang, Qun Jane Gu, Mau-Chung Frank Chang:
An 8.3% Efficiency 96-134 GHz CMOS Frequency Doubler Using Distributed Amplifier and Nonlinear Transmission Line. A-SSCC 2020: 1-2 - [c67]Michael Lo, Zhenman Fang, Jie Wang, Peipei Zhou, Mau-Chung Frank Chang, Jason Cong:
Algorithm-Hardware Co-design for BQSR Acceleration in Genome Analysis ToolKit. FCCM 2020: 157-166 - [c66]Nikola Samardzic, Weikang Qiao, Vaibhav Aggarwal, Mau-Chung Frank Chang, Jason Cong:
Bonsai: High-Performance Adaptive Merge Tree Sorting. ISCA 2020: 282-294 - [c65]Jieqiong Du, Jia Zhou, Chia-Jen Liang, Boyu Hu, Yuan Du, Mau-Chung Frank Chang:
A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory Interface. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j67]Shu-Feng Cheng, Po-Tsang Huang, Li-Chun Wang, Mau-Chung Frank Chang:
Built-In Self-Test/Repair Methodology for Multiband RF-Interconnected TSV 3D Integration. IEEE Des. Test 36(6): 63-71 (2019) - [j66]Yanghyo Rod Kim, Boyu Hu, Yuan Du, Wei-Han Cho, Rulin Huang, Adrian Tang, Huan-Neng Ron Chen, Chewnpu Jou, Jason Cong, Tatsuo Itoh, Mau-Chung Frank Chang:
A Millimeter-Wave CMOS Transceiver With Digitally Pre-Distorted PAM-4 Modulation for Contactless Communications. IEEE J. Solid State Circuits 54(6): 1600-1612 (2019) - [j65]Yuan Du, Li Du, Xuefeng Gu, Jieqiong Du, X. Shawn Wang, Boyu Hu, Mingzhe Jiang, Xiaoliang Chen, Subramanian S. Iyer, Mau-Chung Frank Chang:
An Analog Neural Network Computing Engine Using CMOS-Compatible Charge-Trap-Transistor (CTT). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1811-1819 (2019) - [j64]Yan Zhang, Yanghyo Rod Kim, Adrian Tang, Jon Kawamura, Theodore Reck, Mau-Chung Frank Chang:
Integrated Wide-Band CMOS Spectrometer Systems for Spaceborne Telescopic Sensing. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(5): 1863-1873 (2019) - [j63]Lorena Garcia, Ward Jewell, Mau-Chung Frank Chang, Stephen M. Goodnick, Mohd. Toaha Umar, Hunter DesRoches, Jorge L. Contreras, Richard Cliver, Franc E. Noel, Augusto J. Herrera, Aravindhan Anbazhagan, Boris I. Gramatikov, Tariq S. Durrani, Leon Ong Chua, Ikhlaq Sidhu:
2018 IEEE Educational Activities Board Awards. IEEE Trans. Educ. 62(1): 64-69 (2019) - [c64]Mau-Chung Frank Chang:
Millimeter-Wave System-on-Chip Applications from Space Explorations to Contactless Connectivity. A-SSCC 2019: 103-106 - [c63]Eric Swindlehurst, Hunter Jensen, Alexander Petrie, Yixin Song, Yen-Cheng Kuan, Mau-Chung Frank Chang, Jieh-Tsorng Wu, Shiuh-Hua Wood Chiang:
An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch. ESSCIRC 2019: 83-86 - [c62]Weikang Qiao, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong:
An FPGA-Based BWT Accelerator for Bzip2 Data Compression. FCCM 2019: 96-99 - [c61]Jieqiong Du, Chien-Heng Wong, Yo-Hao Tu, Wei-Han Cho, Yilei Li, Yuan Du, Po-Tsang Huang, Sheau Jiung Lee, Mau-Chung Frank Chang:
A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET. NOCS 2019: 16:1-16:8 - 2018
- [j62]Yilei Li, Kirti Dhwaj, Chien-Heng Wong, Yuan Du, Li Du, Yiwu Tang, Yiyu Shi, Tatsuo Itoh, Mau-Chung Frank Chang:
A Novel Fully Synthesizable All-Digital RF Transmitter for IoT Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 146-158 (2018) - [j61]Li Du, Chun-Chen Liu, Yan Zhang, Yilei Li, Yuan Du, Yen-Cheng Kuan, Mau-Chung Frank Chang:
A Single Layer 3-D Touch Sensing System for Mobile Devices Application. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(2): 286-296 (2018) - [j60]Li Du, Yuan Du, Yilei Li, Junjie Su, Yen-Cheng Kuan, Chun-Chen Liu, Mau-Chung Frank Chang:
A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(1): 198-208 (2018) - [j59]X. Shawn Wang, Xin Jin, Jieqiong Du, Yilei Li, Yuan Du, Chien-Heng Wong, Yen-Cheng Kuan, Chi-Hang Chan, Mau-Chung Frank Chang:
A 2-GS/s 8-Bit ADC Featuring Virtual-Ground Sampling Interleaved Architecture in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1534-1538 (2018) - [c60]Yiwu Tang, Chien-Heng Wong, Yuan Du, Li Du, Yilei Li, Mau-Chung Frank Chang:
A fully integrated 28nm CMOS dual source adaptive thermoelectric and RF energy harvesting circuit with 110mv startup voltage. CICC 2018: 1-4 - [c59]Weikang Qiao, Jieqiong Du, Zhenman Fang, Michael Lo, Mau-Chung Frank Chang, Jason Cong:
High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms. FCCM 2018: 37-44 - [c58]Weikang Qiao, Jieqiong Du, Zhenman Fang, Libo Wang, Michael Lo, Mau-Chung Frank Chang, Jason Cong:
High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only). FPGA 2018: 291 - [c57]Yan Zhang, Yanghyo Kim, Adrian Tang, Jon Kawamura, Theodore Reck, M.-C. Frank Chang:
A 2.6GS/s Spectrometer System in 65nm CMOS for Spaceborne Telescopic Sensing. ISCAS 2018: 1-4 - [c56]Yanghyo Kim, Boyu Hu, Yuan Du, Adrian Tang, Huan-Neng Ron Chen, Chewnpu Jou, Jason Cong, Tatsuo Itoh, Mau-Chung Frank Chang:
A 20Gb/s 79.5mW 127GHz CMOS transceiver with digitally pre-distorted PAM-4 modulation for contactless communications. ISSCC 2018: 278-280 - 2017
- [j58]Yuan Du, Wei-Han Cho, Po-Tsang Huang, Yilei Li, Chien-Heng Wong, Jieqiong Du, Yanghyo Kim, Boyu Hu, Li Du, Chun-Chen Liu, Sheau Jiung Lee, Mau-Chung Frank Chang:
A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection. IEEE J. Solid State Circuits 52(4): 1111-1122 (2017) - [j57]Zuow-Zun Chen, Yen-Cheng Kuan, Yilei Li, Boyu Hu, Chien-Heng Wong, Mau-Chung Frank Chang:
DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers. IEEE J. Solid State Circuits 52(4): 1134-1143 (2017) - [j56]Li Du, Yan Zhang, Chun-Chen Liu, Adrian Tang, Frank Hsiao, Mau-Chung Frank Chang:
A 2.3-mW 11-cm Range Bootstrapped and Correlated-Double-Sampling Three-Dimensional Touch Sensing Circuit for Mobile Devices. IEEE Trans. Circuits Syst. II Express Briefs 64-II(1): 96-100 (2017) - [j55]Boyu Hu, Yuan Du, Rulin Huang, Jeffrey Lee, Young-Kai Chen, Mau-Chung Frank Chang:
A Capacitor-DAC-Based Technique For Pre-Emphasis-Enabled Multilevel Transmitters. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1012-1016 (2017) - [j54]Boyu Hu, Yuan Du, Rulin Huang, Jeffrey Lee, Young-Kai Chen, Mau-Chung Frank Chang:
An R2R-DAC-Based Architecture for Equalization-Equipped Voltage-Mode PAM-4 Wireline Transmitter Design. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3260-3264 (2017) - [c55]Marcus Z. Comiter, Michael B. Crouse, H. T. Kung, Jenn-Hwan Tarng, Zuo-Min Tsai, Wei-Ting Wu, Ta-Sung Lee, M.-C. Frank Chang, Yen-Cheng Kuan:
Millimeter-Wave Field Experiments with Many Antenna Configurations for Indoor Multipath Environments. GLOBECOM Workshops 2017: 1-6 - [c54]Mau-Chung Frank Chang:
Terahertz systems-on-chip enabled by nano-IC technologies. VLSI-DAT 2017: 1 - [i3]Li Du, Yuan Du, Yilei Li, Mau-Chung Frank Chang:
A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things. CoRR abs/1707.02973 (2017) - [i2]Yuan Du, Li Du, Yilei Li, Junjie Su, Mau-Chung Frank Chang:
A Streaming Accelerator for Deep Convolutional Neural Networks with Image and Feature Decomposition for Resource-limited System Applications. CoRR abs/1709.05116 (2017) - [i1]Yuan Du, Li Du, Xuefeng Gu, Xiao Wang, Mau-Chung Frank Chang:
A Memristive Neural Network Computing Engine using CMOS-Compatible Charge-Trap-Transistor (CTT). CoRR abs/1709.06614 (2017) - 2016
- [j53]Yan Zhao, Zuow-Zun Chen, Yuan Du, Yilei Li, Richard Al Hadi, Gabriel Virbila, Yinuo Xu, Yanghyo Kim, Adrian Tang, Theodore Reck, Mau-Chung Frank Chang:
A 0.56 THz Phase-Locked Frequency Synthesizer in 65 nm CMOS Technology. IEEE J. Solid State Circuits 51(12): 3005-3019 (2016) - [j52]Boyu Hu, Fengbo Ren, Zuow-Zun Chen, Xicheng Jiang, Mau-Chung Frank Chang:
An 8-Bit Compressive Sensing ADC With 4-GS/s Equivalent Speed Utilizing Self-Timed Pipeline SAR-Binary-Search. IEEE Trans. Circuits Syst. II Express Briefs 63-II(10): 934-938 (2016) - [c53]Li Du, Chun-Chen Liu, Adrian Tang, Yan Zhang, Yilei Li, Kye Cheung, Mau-Chung Frank Chang:
Invited - Airtouch: a novel single layer 3D touch sensing system for human/mobile devices interactions. DAC 2016: 1:1-1:6 - [c52]Chun-Chen Liu, Yen-Hsiang Wang, Yilei Li, Chien-Heng Wong, Tien Pei Chou, Young-Kai Chen, M.-C. Frank Chang:
Invited - A 2.2 GHz SRAM with high temperature variation immunity for deep learning application under 28nm. DAC 2016: 2:1-2:6 - [c51]Mau-Chung Frank Chang, Yu-Ting Chen, Jason Cong, Po-Tsang Huang, Chun-Liang Kuo, Cody Hao Yu:
The SMEM Seeding Acceleration for DNA Sequence Alignment. FCCM 2016: 32-39 - [c50]Yan Zhao, Zuow-Zun Chen, Gabriel Virbila, Yinuo Xu, Richard Al Hadi, Yanghyo Kim, Adrian Tang, Theodore Reck, Huan-Neng Ron Chen, Chewnpu Jou, Fu-Lung Hsueh, Mau-Chung Frank Chang:
2.1 An integrated 0.56THz frequency synthesizer with 21GHz locking range and -74dBc/Hz phase noise at 1MHz offset in 65nm CMOS. ISSCC 2016: 36-37 - [c49]Wei-Han Cho, Yilei Li, Yuan Du, Chien-Heng Wong, Jieqiong Du, Po-Tsang Huang, Sheau Jiung Lee, Huan-Neng Ron Chen, Chewnpu Jou, Fu-Lung Hsueh, Mau-Chung Frank Chang:
10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface. ISSCC 2016: 184-185 - [c48]Xicheng Jiang, Axel Thomsen, Piero Malcovati, M.-C. Frank Chang:
EE1: Class of 2025 - Where will be the best jobs? ISSCC 2016: 518 - [c47]Zuow-Zun Chen, Yilei Li, Yen-Cheng Kuan, Boyu Hu, Chien-Heng Wong, Mau-Chung Frank Chang:
Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers. VLSI Circuits 2016: 1-2 - [c46]Yuan Du, Wei-Han Cho, Yilei Li, Chien-Heng Wong, Jieqiong Du, Po-Tsang Huang, Yanghyo Kim, Zuow-Zun Chen, Sheau Jiung Lee, Mau-Chung Frank Chang:
A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS. VLSI Circuits 2016: 1-2 - 2015
- [j51]Hao Wu, Mohyee Mikhemar, David Murphy, Hooman Darabi, Mau-Chung Frank Chang:
A Blocker-Tolerant Inductor-Less Wideband Receiver With Phase and Thermal Noise Cancellation. IEEE J. Solid State Circuits 50(12): 2948-2964 (2015) - [j50]Fanta Chen, Jen-Ming Wu, Mau-Chung Frank Chang:
40-Gb/s 0.7-V 2: 1 MUX and 1: 2 DEMUX with Transformer-Coupled Technique for SerDes Interface. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(4): 1042-1051 (2015) - [j49]Yen-Cheng Kuan, Yi-Kai Lo, Yanghyo Kim, Mau-Chung Frank Chang, Wentai Liu:
Wireless Gigabit Data Telemetry for Large-Scale Neural Recording. IEEE J. Biomed. Health Informatics 19(3): 949-957 (2015) - [c45]Wei-Han Cho, Yilei Li, Yanghyo Kim, Po-Tsang Huang, Yuan Du, Sheau Jiung Lee, Mau-Chung Frank Chang:
A 5.4-mW 4-Gb/s 5-band QPSK transceiver for frequency-division multiplexing memory interface. CICC 2015: 1-4 - [c44]Frank Hsiao, Adrian Tang, Y. Kim, Brian J. Drouin, Goutam Chattopadhyay, M.-C. Frank Chang:
A 2.2 GS/s 188mW spectrometer processor in 65nm CMOS for supporting low-power THz planetary instruments. CICC 2015: 1-3 - [c43]Zuow-Zun Chen, Yen-Hsiang Wang, Jaewook Shin, Yan Zhao, Seyed Arash Mirhaj, Yen-Cheng Kuan, Huan-Neng Ron Chen, Chewnpu Jou, Ming-Hsien Tsai, Fu-Lung Hsueh, Mau-Chung Frank Chang:
14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB. ISSCC 2015: 1-3 - [c42]Li Du, Yan Zhang, Frank Hsiao, Adrian Tang, Yan Zhao, Yilei Li, Zuow-Zun Chen, Liting Huang, Mau-Chung Frank Chang:
6.7 A 2.3mW 11cm-range bootstrapped and correlated-double-sampling (BCDS) 3D touch sensor for mobile devices. ISSCC 2015: 1-3 - [c41]Hao Wu, Mohyee Mikhemar, David Murphy, Hooman Darabi, Mau-Chung Frank Chang:
2.1 A highly linear inductorless wideband receiver with phase- and thermal-noise cancellation. ISSCC 2015: 1-3 - [c40]Ming-Shuan Chen, Mau-Chung Frank Chang, Chih-Kong Ken Yang:
A low-PDP and low-area repeater using passive CTLE for on-chip interconnects. VLSIC 2015: 244- - 2014
- [j48]X. Shawn Wang, Xin Wang, Fei Lu, Chen Zhang, Zongyu Dong, Li Wang, Rui Ma, Zitao Shi, Albert Z. Wang, Mau-Chung Frank Chang, Dawn Wang, Alvin J. Joseph, C. Patrick Yue:
Concurrent Design Analysis of High-Linearity SP10T Switch With 8.5 kV ESD Protection. IEEE J. Solid State Circuits 49(9): 1927-1941 (2014) - [j47]David Murphy, Ahmad Mirzaei, Hooman Darabi, Mau-Chung Frank Chang, Asad A. Abidi:
An LTV Analysis of the Frequency Translational Noise-Cancelling Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(1): 266-279 (2014) - [j46]Fanta Chen, Min-Sheng Kao, Yu-Hao Hsu, Jen-Ming Wu, Ching-Te Chiu, Shawn S. H. Hsu, Mau-Chung Frank Chang:
A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(11): 3278-3287 (2014) - [c39]Adrian Tang, Mau-Chung Frank Chang, Goutam Chattopadhyay, Z. Chen, Theodore Reck, H. Schone, Y. Zhao, L. Du, David Murphy, N. Chahat, E. Decrossas, I. Mehdi:
CMOS (Sub)-mm-Wave System-on-Chip for exploration of deep space and outer planetary systems. CICC 2014: 1-4 - 2013
- [j45]Chunhua Xiao, M.-C. Frank Chang, Jason Cong, Michael Gill, Zhangqin Huang, Chunyue Liu, Glenn Reinman, Hao Wu:
Stream arbitration: Towards efficient bandwidth utilization for emerging on-chip interconnects. ACM Trans. Archit. Code Optim. 9(4): 60:1-60:27 (2013) - [j44]Sandeep D'Souza, Frank Hsiao, Adrian Tang, Sai-Wang Tam, Roc Berenguer, Mau-Chung Frank Chang:
A 10-Bit 2-GS/s DAC-DDFS-IQ-Controller Baseband Enabling a Self-Healing 60-GHz Radio-on-Chip. IEEE Trans. Circuits Syst. II Express Briefs 60-II(8): 457-461 (2013) - [c38]Fanta Chen, Jen-Ming Wu, Jenny Yi-Chun Liu, Mau-Chung Frank Chang:
A 100Gb/s quad-rate transformer-coupled injection-locking CDR circuit in 65nm CMOS. ISCAS 2013: 1950-1953 - [c37]Adrian Tang, Mau-Chung Frank Chang:
A 294 GHz 0.47mW caterpillar amplifier based transmitter in 65nm CMOS For THz data-links. RWS 2013: 46-48 - 2012
- [j43]Charles Chien, Adrian Tang, Frank Hsiao, Mau-Chung Frank Chang:
Dual-Control Self-Healing Architecture for High-Performance Radio SoCs. IEEE Des. Test 29(6): 40-51 (2012) - [j42]Yanghyo Kim, Sai-Wang Tam, Gyungsu Byun, Hao Wu, Lan Nan, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang:
Analysis of Noncoherent ASK Modulation-Based RF-Interconnect for Memory Interface. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(2): 200-209 (2012) - [j41]Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang:
Utilizing Radio-Frequency Interconnect for a Many-DIMM DRAM System. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(2): 210-227 (2012) - [j40]Gyungsu Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, Mau-Chung Frank Chang:
An Energy-Efficient and High-Speed Mobile Memory I/O Interface Using Simultaneous Bi-Directional Dual (Base+RF)-Band Signaling. IEEE J. Solid State Circuits 47(1): 117-130 (2012) - [j39]Jianhua Lu, Ning-Yi Wang, Mau-Chung Frank Chang:
A Compact and Low Power 5-10 GHz Quadrature Local Oscillator for Cognitive Radio Applications. IEEE J. Solid State Circuits 47(5): 1131-1140 (2012) - [j38]I-Ning Ku, Zhiwei Xu, Yen-Cheng Kuan, Yen-Hsiang Wang, Mau-Chung Frank Chang:
A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications. IEEE J. Solid State Circuits 47(8): 1854-1865 (2012) - [j37]Chih-Wen Lu, Ping-Yeh Yin, Ching-Min Hsiao, Mau-Chung Frank Chang, Yo-Sheng Lin:
A 10-bit Resistor-Floating-Resistor-String DAC (RFR-DAC) for High Color-Depth LCD Driver ICs. IEEE J. Solid State Circuits 47(10): 2454-2466 (2012) - [j36]David Murphy, Hooman Darabi, Asad A. Abidi, Amr Amin Hafez, Ahmad Mirzaei, Mohyee Mikhemar, Mau-Chung Frank Chang:
A Blocker-Tolerant, Noise-Cancelling Receiver Suitable for Wideband Wireless Applications. IEEE J. Solid State Circuits 47(12): 2943-2963 (2012) - [j35]Kanit Therdsteerasukdi, Gyungsu Byun, Jason Cong, M. Frank Chang, Glenn Reinman:
Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system. ACM Trans. Archit. Code Optim. 8(4): 51:1-51:19 (2012) - [j34]Qun Jane Gu, Kang Yang, Yi Xue, Zhiwei Xu, Adrian Tang, Chin-Chung Nien, T. H. Wu, Jenn-Hwan Tarng, Mau-Chung Frank Chang:
A CMOS Integrated W-band Passive Imager. IEEE Trans. Circuits Syst. II Express Briefs 59-II(11): 736-740 (2012) - [c36]Hao Wu, Lan Nan, Sai-Wang Tam, Hsieh-Hung Hsieh, Chewnpu Jou, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang:
A 60GHz on-chip RF-Interconnect with λ/4 coupler for 5Gbps bi-directional communication and multi-drop arbitration. CICC 2012: 1-4 - [c35]Yanghyo Kim, Gyungsu Byun, Adrian Tang, Chewnpu Jou, Hsieh-Hung Hsieh, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang:
An 8Gb/s/pin 4pJ/b/pin Single-T-Line dual (base+RF) band simultaneous bidirectional mobile memory I/O interface with inter-channel interference suppression. ISSCC 2012: 50-52 - [c34]David Murphy, Amr Hafez, Ahmad Mirzaei, Mohyee Mikhemar, Hooman Darabi, Mau-Chung Frank Chang, Asad A. Abidi:
A blocker-tolerant wideband noise-cancelling receiver with a 2dB noise figure. ISSCC 2012: 74-76 - [c33]Adrian Tang, Gabriel Virbila, David Murphy, Frank Hsiao, Yen-Hsiang Wang, Qun Jane Gu, Zhiwei Xu, Y. Wu, M. Zhu, Mau-Chung Frank Chang:
A 144GHz 0.76cm-resolution sub-carrier SAR phase radar for 3D imaging in 65nm CMOS. ISSCC 2012: 264-266 - [c32]Adrian Tang, Frank Hsiao, David Murphy, I-Ning Ku, Jenny Yi-Chun Liu, Sandeep D'Souza, Ning-Yi Wang, Hao Wu, Yen-Hsiang Wang, Mandy Tang, Gabriel Virbila, Mike Pham, Derek Yang, Qun Jane Gu, Yi-Cheng Wu, Yen-Cheng Kuan, Charles Chien, Mau-Chung Frank Chang:
A low-overhead self-healing embedded system for ensuring high yield and long-term sustainability of 60GHz 4Gb/s radio-on-a-chip. ISSCC 2012: 316-318 - 2011
- [j33]Sai-Wang Tam, Mau-Chung Frank Chang:
RF/wireless-interconnect: The next wave of connectivity. Sci. China Inf. Sci. 54(5): 1026-1038 (2011) - [j32]Adrian Tang, Qun Jane Gu, Mau-Chung Frank Chang:
CMOS receivers for active and passive mm-wave imaging. IEEE Commun. Mag. 49(10): 190-198 (2011) - [j31]Jongsun Kim, Gyungsu Byun, M. Frank Chang:
A Low-Overhead and Low-Power RF Transceiver for Short-Distance On- and Off-Chip Interconnects. IEICE Trans. Electron. 94-C(5): 854-857 (2011) - [j30]Jenny Yi-Chun Liu, Mau-Chung Frank Chang:
A 60 GHz High Gain Transformer-Coupled Differential Cascode Power Amplifier in 65 nm CMOS. IEICE Trans. Electron. 94-C(10): 1508-1514 (2011) - [j29]David Murphy, Qun Jane Gu, Yi-Cheng Wu, Heng-Yu Jian, Zhiwei Xu, Adrian Tang, Frank Wang, Mau-Chung Frank Chang:
A Low Phase Noise, Wideband and Compact CMOS PLL for Use in a Heterodyne 802.15.3c Transceiver. IEEE J. Solid State Circuits 46(7): 1606-1617 (2011) - [j28]Qun Jane Gu, Heng-Yu Jian, Zhiwei Xu, Yi-Cheng Wu, Mau-Chung Frank Chang, Yves Baeyens, Young-Kai Chen:
CMOS Prescaler(s) With Maximum 208-GHz Dividing Speed and 37-GHz Time-Interleaved Dual-Injection Locking Range. IEEE Trans. Circuits Syst. II Express Briefs 58-II(7): 393-397 (2011) - [c31]Frank Hsiao, Adrian Tang, Derek Yang, Mike Pham, Mau-Chung Frank Chang:
A 7Gb/s SC-FDE/OFDM MMSE equalizer for 60GHz wireless communications. A-SSCC 2011: 293-296 - [c30]I-Ning Ku, Zhiwei Xu, Yen-Cheng Kuan, Yen-Hsiang Wang, Mau-Chung Frank Chang:
A 40-mW 7-bit 2.2-GS/s time-interleaved subranging ADC for low-power gigabit wireless communications in 65-nm CMOS. CICC 2011: 1-4 - [c29]Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, M. Frank Chang:
The DIMM tree architecture: A high bandwidth and scalable memory system. ICCD 2011: 388-395 - [c28]Sandeep D'Souza, Mau-Chung Frank Chang, Sudhakar Pamarti, Bipul Agarwal, Hossein Zarei, Tirdad Sowlati, Roc Berenguer:
A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitter. ISCAS 2011: 450-453 - [c27]Adrian Tang, Mau-Chung Frank Chang:
183GHz 13.5mW/pixel CMOS regenerative receiver for mm-wave imaging applications. ISSCC 2011: 296-298 - [c26]Chih-Wen Lu, Ping-Yeh Yin, Ching-Min Hsiao, Mau-Chung Frank Chang:
A 10b resistor-resistor-string DAC with current compensation for compact LCD driver ICs. ISSCC 2011: 318-320 - [c25]Gyungsu Byun, Yanghyo Kim, Jongsun Kim, Sai-Wang Tam, Hsieh-Hung Hsieh, P.-Y. Wu, Chewnpu Jou, Jason Cong, Glenn Reinman, Mau-Chung Frank Chang:
An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling. ISSCC 2011: 488-490 - [p1]Sai-Wang Tam, Eran Socher, Mau-Chung Frank Chang, Jason Cong, Glenn D. Reinman:
RF-Interconnect for Future Network-On-Chip. Low Power Networks-on-Chip 2011: 255-280 - 2010
- [j27]Heng-Yu Jian, Zhiwei Xu, Yi-Cheng Wu, Mau-Chung Frank Chang:
A Fractional- PLL for Multiband (0.8-6 GHz) Communications Using Binary-Weighted D/A Differentiator and Offset-Frequency Δ-Σ Modulator. IEEE J. Solid State Circuits 45(4): 768-780 (2010) - [c24]Zhiwei Xu, Qun Jane Gu, Yi-Cheng Wu, Adrian Tang, Yu-Ling Lin, Ho-Hsian Chen, Chewnpu Jou, Mau-Chung Frank Chang:
D-band CMOS transmitter and receiver for multi-giga-bit/sec wireless data link. CICC 2010: 1-4 - [c23]David Murphy, Qun Jane Gu, Yi-Cheng Wu, Heng-Yu Jian, Zhiwei Xu, Adrian Tang, Frank Wang, Yu-Ling Lin, Ho-Hsian Chen, Chewnpu Jou, Mau-Chung Frank Chang:
A low phase noise, wideband and compact CMOS PLL for use in a heterodyne 802.15.3c TRX. ESSCIRC 2010: 258-261
2000 – 2009
- 2009
- [j26]Hao Yu, Lei He, Mau-Chung Frank Chang:
Robust On-Chip Signaling by Staggered and Twisted Bundle. IEEE Des. Test Comput. 26(5): 92-104 (2009) - [j25]Tim R. LaRocca, Jenny Yi-Chun Liu, Mau-Chung Frank Chang:
60 GHz CMOS Amplifiers Using Transformer-Coupling and Artificial Dielectric Differential Transmission Lines for Compact Design. IEEE J. Solid State Circuits 44(5): 1425-1435 (2009) - [c22]Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, Songwu Lu, M. Frank Chang, Chuanxiong Guo, Glenn Reinman, Chunyi Peng, Mishali Naik, Lixia Zhang, Jason Cong:
A scalable micro wireless interconnect structure for CMPs. MobiCom 2009: 217-228 - [c21]Jason Cong, Mau-Chung Frank Chang, Glenn Reinman, Sai-Wang Tam:
Multiband RF-interconnect for reconfigurable network-on-chip communications. SLIP 2009: 107-108 - 2008
- [j24]Qun Gu, Zhiwei Xu, Daquan Huang, Tim R. LaRocca, Ning-Yi Wang, William Hant, Mau-Chung Frank Chang:
A Low Power V-Band CMOS Frequency Divider With Wide Locking Range and Accurate Quadrature Output Phases. IEEE J. Solid State Circuits 43(4): 991-998 (2008) - [j23]Daquan Huang, Tim R. LaRocca, Mau-Chung Frank Chang, Lorene Samoska, Andy Fung, Richard L. Campbell, Michael Andrews:
Terahertz CMOS Frequency Generator Using Linear Superposition Technique. IEEE J. Solid State Circuits 43(12): 2730-2738 (2008) - [j22]Jongsun Kim, Bo-Cheng Lai, Mau-Chung Frank Chang, Ingrid Verbauwhede:
A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems. IEEE Trans. Computers 57(12): 1714-1719 (2008) - [j21]Heng-Yu Jian, Zhiwei Xu, Mau-Chung Frank Chang:
Delta-Sigma D/A Converter Using Binary- Weighted Digital-to-Analog Differentiator for Second-Order Mismatch Shaping. IEEE Trans. Circuits Syst. II Express Briefs 55-II(1): 6-10 (2008) - [j20]Hairong Yu, Mau-Chung Frank Chang:
A 1-V 1.25-GS/S 8-Bit Self-Calibrated Flash ADC in 90-nm Digital CMOS. IEEE Trans. Circuits Syst. II Express Briefs 55-II(7): 668-672 (2008) - [j19]Zhengyu Wang, Mau-Chung Frank Chang:
A 600-MSPS 8-bit CMOS ADC Using Distributed Track-and-Hold With Complementary Resistor/Capacitor Averaging. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3621-3627 (2008) - [c20]M. Frank Chang, Jason Cong, Adam Kaplan, Mishali Naik, Glenn Reinman, Eran Socher, Sai-Wang Tam:
CMP network-on-chip overlaid with multi-band RF-interconnect. HPCA 2008: 191-202 - [c19]Yuan-Mao Chang, Andres I. Vila Casado, Mau-Chung Frank Chang, Richard D. Wesel:
Lower-Complexity Layered Belief-Propagation Decoding of LDPC Codes. ICC 2008: 1155-1160 - [c18]M.-C. Frank Chang, Eran Socher, Sai-Wang Tam, Jason Cong, Glenn Reinman:
RF interconnects for communications on-chip. ISPD 2008: 78-83 - [c17]Daquan Huang, Tim R. LaRocca, Lorene Samoska, Andy Fung, M.-C. Frank Chang:
324GHz CMOS Frequency Generator Using Linear Superposition Technique. ISSCC 2008: 476-477 - [c16]M.-C. Frank Chang, Jason Cong, Adam Kaplan, Chunyue Liu, Mishali Naik, Jagannath Premkumar, Glenn Reinman, Eran Socher, Sai-Wang Tam:
Power reduction of CMP communication networks via RF-interconnects. MICRO 2008: 376-387 - [r1]M.-C. Frank Chang, Charles Chien, Zhiwei Xu:
Compact Dual-Band Direct Conversion CMOS Transceiver. Encyclopedia of Wireless and Mobile Communications 2008 - 2007
- [j18]Eran Socher, Mau-Chung Frank Chang:
Can RF Help CMOS Processors? [Topics in Circuits for Communications]. IEEE Commun. Mag. 45(8): 104-111 (2007) - [j17]Jongsun Kim, Ingrid Verbauwhede, M.-C. Frank Chang:
Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication. IEEE Trans. Very Large Scale Integr. Syst. 15(8): 881-894 (2007) - [c15]Qun Gu, Zhiwei Xu, Jenwei Ko, Mau-Chung Frank Chang:
Two 10Gb/s/pin Low-Power Interconnect Methods for 3D ICs. ISSCC 2007: 448-614 - 2006
- [c14]Daquan Huang, William Hant, Ning-Yi Wang, Tai W. Ku, Qun Gu, Raymond Wong, Mau-Chung Frank Chang:
A 60GHz CMOS VCO Using On-Chip Resonator with Embedded Artificial Dielectric for Size, Loss and Noise Reduction. ISSCC 2006: 1218-1227 - [c13]Minghui Chen, Yue Wu, M. Frank Chang:
Active 2nd-order intermodulation calibration for direct-conversion receivers. ISSCC 2006: 1830-1839 - 2005
- [j16]Xicheng Jiang, Mau-Chung Frank Chang:
A 1-GHz signal bandwidth 6-bit CMOS ADC with power-efficient averaging. IEEE J. Solid State Circuits 40(2): 532-535 (2005) - [j15]Todd S. Kaplan, Joseph F. Jensen, Charles H. Fields, Mau-Chung Frank Chang:
A 2-GS/s 3-bit ΔΣ-modulated DAC with tunable bandpass mismatch shaping. IEEE J. Solid State Circuits 40(3): 603-610 (2005) - [j14]Sining Zhou, Mau-Chung Frank Chang:
A CMOS passive mixer with low flicker noise for low-power direct-conversion receiver. IEEE J. Solid State Circuits 40(5): 1084-1093 (2005) - [j13]Jongsun Kim, Ingrid Verbauwhede, Mau-Chung Frank Chang:
A 5.6-mW 1-Gb/s/pair pulsed signaling transceiver for a fully AC coupled bus. IEEE J. Solid State Circuits 40(6): 1331-1340 (2005) - [c12]Kyuchul Chong, Xi Zhang, King-Ning Tu, Daquan Huang, Mau-Chung Frank Chang, Ya-Hong Xie:
Three-dimensional impedance engineering for mixed-signal system-on-chip applications. CICC 2005: 663-666 - [c11]M. Frank Chang:
CDMA/FDMA-interconnects for future ULSI communications. ICCAD 2005: 975-978 - 2004
- [c10]Zhengyu Wang, M.-C. Frank Chang, Jessica Chiatai Chou:
A simple DDS architecture with highly efficient sine function lookup table. ACM Great Lakes Symposium on VLSI 2004: 154-157 - [c9]Qun Gu, Zhiwei Xu, Jenwei Ko, Szukang Hsien, M. Frank Chang:
A self-synchronized RF-interconnect for 3-dimensional integrated circuits. ISCAS (4) 2004: 317-320 - [c8]Yin-Lung Lu, Yi-Cheng Wu, Kyung-Wan Yu, Wei-Li Chen, M. Frank Chang:
Design of a 1.8 V 4.9 ~ 5.9 GHz CMOS broadband low noise amplifier with 0.28 dB gain flatness using AMER inductor loads. ISCAS (1) 2004: 601-604 - 2003
- [j12]Hyunchol Shin, Zhiwei Xu, M. Frank Chang:
A 1.8-V 6/9-GHz reconfigurable dual-band quadrature LC VCO in SiGe BiCMOS technology. IEEE J. Solid State Circuits 38(6): 1028-1032 (2003) - [c7]Todd S. Kaplan, Jose M. Cruz-Albrecht, Mehran Mokttari, Dave Mattews, Joseph F. Jensen, M. Frank Chang:
A 1.3-GHz IF digitizer using a 4th-order continuous-time bandpass ΔΣ modulator. CICC 2003: 127-130 - [c6]Jongsun Kim, Zhiwei Xu, M. Frank Chang:
A 2-Gb/s/pin source synchronous CDMA bus interface with simultaneous multi-chip access and reconfigurable I/O capability. CICC 2003: 317-320 - [c5]Alireza Razzaghi, M.-C. Frank Chang:
A 10-b, 1-GSample/s track-and-hold amplifier using SiGe BiCMOS technology. CICC 2003: 433-436 - [c4]Jongsun Kim, Zhiwei Xu, Mau-Chung Frank Chang:
Reconfigurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers. ISCAS (2) 2003: 33-36 - 2002
- [c3]Yi-Cheng Wu, M. Frank Chang:
On-chip RF spiral inductors and bandpass filters using active magnetic energy recovery. CICC 2002: 275-278 - [c2]Ingrid Verbauwhede, M.-C. Frank Chang:
Reconfigurable interconnect for next generation systems. SLIP 2002: 71-74 - 2001
- [j11]Mau-Chung Frank Chang, Vwani P. Roychowdhury, Liyang Zhang, Hyunchol Shin, Yongxi Qian:
RF/wireless interconnect for inter- and intra-chip communications. Proc. IEEE 89(4): 456-466 (2001) - 2000
- [j10]Pei-Der Tseng, Liyang Zhang, Guang-Bo Gao, M. Frank Chang:
A 3-V monolithic SiGe HBT power amplifier for dual-mode (CDMA/AMPS) cellular handset applications. IEEE J. Solid State Circuits 35(9): 1338-1344 (2000)
1990 – 1999
- 1998
- [c1]David R. Pehlke, Michael Schroter, A. Burstein, Mishel Matloubian, M. Frank Chang:
High-frequency application of MOS compact models and their development for scalable RF model libraries. CICC 1998: 219-222 - 1995
- [j9]Ken Poulton, Knud L. Knudsen, John J. Corcoran, Keh-Chung Wang, Randy B. Nubling, Richard L. Pierson, Mau-Chung Frank Chang, Peter M. Asbeck, R. T. Huang:
A 6-b, 4 GSa/s GaAs HBT ADC. IEEE J. Solid State Circuits 30(10): 1109-1118 (1995) - 1993
- [j8]Peter M. Asbeck, Mau-Chung Frank Chang, Keh-Chung Wang, Gerard J. Sullivan, Derek T. Cheung:
GaAs-based heterojunction bipolar transistors for very high performance electronic circuits. Proc. IEEE 81(12): 1709-1726 (1993) - 1992
- [j7]Klaus Runge, Detlef Daniel, R. D. Standley, James L. Gimlett, Randall B. Nubling, Richard L. Pierson, Steve M. Beccue, Keh-Chung Wang, Neng-Huang Sheng, Mau-Chung Frank Chang, Dong Ming Chen, Peter M. Asbeck:
AlGaAs/GaAs HBT IC's for high-speed lightwave transmission systems. IEEE J. Solid State Circuits 27(10): 1332-1341 (1992) - [j6]Keh-Chung Wang, Steve M. Beccue, Mau-Chung Frank Chang, Randall B. Nubling, Arthur M. Cappon, Tom C.-T. Tsen, Dong Ming Chen, Peter M. Asbeck, Chung Y. Kwok:
Diode-HBT-logic circuits monolithically integrable with ECl/CML circuits. IEEE J. Solid State Circuits 27(10): 1372-1378 (1992) - [j5]Ken Poulton, Knud L. Knudsen, John J. Corcoran, Keh-Chung Wang, Richard L. Pierson, Randall B. Nubling, Mau-Chung Frank Chang:
Thermal design and simulation of bipolar integrated circuits. IEEE J. Solid State Circuits 27(10): 1379-1387 (1992) - [j4]Mehran Bagheri, Keh-Chung Wang, Mau-Chung Frank Chang, Randy B. Nubling, Peter M. Asbeck, Andy Chen:
11.6-GHz 1:4 regenerating demultiplexer with bit-rotation control and 6.1-GHz auto-latching phase-aligner ICs using AlGaAs/GaAs HBT technology. IEEE J. Solid State Circuits 27(12): 1787-1793 (1992) - 1991
- [j3]Randy B. Nubling, James Yu, Keh-Chung Wang, Peter M. Asbeck, Neng-Huang Sheng, Mau-Chung Frank Chang, Richard L. Pierson, Gerard J. Sullivan, Mark A. McDonald, A. J. Price, A. D. M. Chen:
High-speed 8:1 multiplexer and 1:8 demultiplexer implemented with AlGaAs/GaAs HBTs. IEEE J. Solid State Circuits 26(10): 1354-1361 (1991) - [j2]Neng-Huang Sheng, Richard L. Pierson, Keh-Chung Wang, Randy B. Nubling, Peter M. Asbeck, Mau-Chung Frank Chang, W. L. Edwards, D. E. Philips:
A high-speed multimodulus HBT prescaler for frequency synthesizer applications. IEEE J. Solid State Circuits 26(10): 1362-1367 (1991) - [j1]Keh-Chung Wang, Peter M. Asbeck, Mau-Chung Frank Chang, Randy B. Nubling, Richard L. Pierson, Neng-Huang Sheng, Gerard J. Sullivan, Jimmy Yu, Andy Chen, Don Clement, Tom C.-T. Tsen, Haris F. Basit, Joseph D. George, Rock Young:
A 15-GHz gate array implemented with AlGaAs/GaAs heterojunction bipolar transistors. IEEE J. Solid State Circuits 26(11): 1669-1672 (1991)
Coauthor Index
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