default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSoontae Kim
Person information
- affiliation: Korea Advanced Institute of Science and Technology, Daejeon, South Korea
- affiliation (former): Information and Communications University, Daejeon, South Korea
- affiliation (2004 - 2007): University of South Florida, Tampa, FL, USA
- affiliation (PhD 2003): Pennsylvania State University, University Park, PA, USA
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j43]Myeongjae Jang
, Jinkwon Kim, Haejin Nam, Soontae Kim:
Zero and Narrow-Width Value-Aware Compression for Quantized Convolutional Neural Networks. IEEE Trans. Computers 73(1): 249-262 (2024)- [j42]Wonyoung Lee, Mincheol Kang, Soontae Kim:
Highly VM-Scalable SSD in Cloud Storage Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 113-126 (2024) - 2023
- [j41]Jesung Kim, Mincheol Kang, Bohun Seo, Jeongkyu Hong, Soontae Kim:
Effective Emoticon Suggestion Technique Based on Active Emotional Input Using Facial Expressions and Heart Rate Signals. Sensors 23(9): 4460 (2023) - [j40]Mincheol Kang, Wonyoung Lee, Jinkwon Kim, Soontae Kim:
PR-SSD: Maximizing Partial Read Potential by Exploiting Compression and Channel-Level Parallelism. IEEE Trans. Computers 72(3): 772-785 (2023) - [c41]Sangwon Han, Geonyeong Park, Yoonyong Ahn, Gunhee Cho, Soontae Kim, Kunsoo Huh:
Estimated State-Based Optimal Path Planning and Control System for Lane-Keeping of Semi-Trailer Trucks. ITSC 2023: 918-924 - [c40]Jinkwon Kim, Myeongjae Jang, Haejin Nam, Soontae Kim:
HARP: Hardware-Based Pseudo-Tiling for Sparse Matrix Multiplication Accelerator. MICRO 2023: 1148-1162 - 2022
- [j39]Jesung Kim, Wonyoung Lee, Jeongkyu Hong, Soontae Kim:
Efficient Integrity-Tree Structure for Convolutional Neural Networks through Frequent Counter Overflow Prevention in Secure Memories. Sensors 22(22): 8762 (2022) - [c39]Junoh Moon, Mincheol Kang, Wonyoung Lee, Soontae Kim:
Salvaging Runtime Bad Blocks by Skipping Bad Pages for Improving SSD Performance. DATE 2022: 576-579 - [c38]Myeongjae Jang, Jinkwon Kim, Jesung Kim, Soontae Kim:
ENCORE Compression: Exploiting Narrow-width Values for Quantized Deep Neural Networks. DATE 2022: 1503-1508 - [c37]Jinkwon Kim, Mincheol Kang, Jeongkyu Hong, Soontae Kim:
Exploiting Inter-block Entropy to Enhance the Compressibility of Blocks with Diverse Data. HPCA 2022: 1100-1114 - 2021
- [j38]Hamed Farbeh, Leila Delshadtehrani, Hyeonggyu Kim, Soontae Kim:
ECC-United Cache: Maximizing Efficiency of Error Detection/Correction Codes in Associative Cache Memories. IEEE Trans. Computers 70(4): 640-654 (2021) - [j37]Jinkwon Kim, Seokin Hong, Jeongkyu Hong, Soontae Kim:
CID: Co-Architecting Instruction Cache and Decompression System for Embedded Systems. IEEE Trans. Computers 70(7): 1132-1145 (2021) - [j36]Imran Fareed, Mincheol Kang, Wonyoung Lee, Soontae Kim:
Update Frequency-Directed Subpage Management for Mitigating Garbage Collection and DRAM Overheads. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(12): 2467-2480 (2021) - 2020
- [j35]Bohun Seo, Hyeonggyu Kim, Soontae Kim:
Freezing: Eliminating Unnecessary Drawing Computation for Low Power. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(1): 56-61 (2020) - [j34]Muhammad Avais Qureshi, Jungwoo Park, Soontae Kim:
SALE: Smartly Allocating Low-Cost Many-Bit ECC for Mitigating Read and Write Errors in STT-RAM Caches. IEEE Trans. Very Large Scale Integr. Syst. 28(6): 1357-1370 (2020) - [c36]Imran Fareed, Mincheol Kang, Wonyoung Lee, Soontae Kim:
Leveraging intra-page update diversity for mitigating write amplification in SSDs. ICS 2020: 23:1-23:12
2010 – 2019
- 2019
- [j33]Jungwoo Park, Myoungjun Lee, Soontae Kim, Minho Ju, Jeongkyu Hong:
MH Cache: A Mult Stephen Jarvisi-retention STT-RAM-based Low-power Last-level Cache for Mobile Hardware Rendering Systems. ACM Trans. Archit. Code Optim. 16(3): 26:1-26:26 (2019) - [j32]Myoungjun Lee, Soontae Kim:
Time-sensitivity-aware shared cache architecture for multi-core embedded systems. J. Supercomput. 75(10): 6746-6776 (2019) - [j31]Muhammad Avais Qureshi, Hyeonggyu Kim, Soontae Kim:
A Restore-Free Mode for MLC STT-RAM Caches. IEEE Trans. Very Large Scale Integr. Syst. 27(6): 1465-1469 (2019) - [j30]Wonyoung Lee, Mincheol Kang, Seokin Hong, Soontae Kim:
Interpage-Based Endurance-Enhancing Lower State Encoding for MLC and TLC Flash Memory Storages. IEEE Trans. Very Large Scale Integr. Syst. 27(9): 2033-2045 (2019) - 2018
- [j29]Mincheol Kang, Wonyoung Lee, Soontae Kim:
Subpage-Aware Solid State Drive for Improving Lifetime and Performance. IEEE Trans. Computers 67(10): 1492-1505 (2018) - [j28]Hyeonggyu Kim, Minho Ju, Soontae Kim:
OnNetwork+: Network Delay-Aware Management for Mobile Systems. ACM Trans. Embed. Comput. Syst. 17(3): 64:1-64:23 (2018) - [c35]Jeongkyu Hong, Hyeonggyu Kim, Soontae Kim:
EAR: ECC-aided refresh reduction through 2-D zero compression. PACT 2018: 6:1-6:11 - 2017
- [j27]Jeongkyu Hong, Soontae Kim:
Smart ECC Allocation Cache Utilizing Cache Data Space. IEEE Trans. Computers 66(2): 368-374 (2017) - [j26]Jesung Kim, Jongmin Lee, Soontae Kim:
TLB Index-Based Tagging for Reducing Data Cache and TLB Energy Consumption. IEEE Trans. Computers 66(7): 1200-1211 (2017) - [j25]Jungwoo Park, Jongmin Lee, Soontae Kim:
A Way-Filtering-Based Dynamic Logical-Associative Cache Architecture for Low-Energy Consumption. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 793-805 (2017) - [j24]Hyeonggyu Kim, Soontae Kim, Jooheung Lee:
Write-Amount-Aware Management Policies for STT-RAM Caches. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1588-1592 (2017) - [c34]Yebin Lee, Hyeonggyu Kim, Seokin Hong, Soontae Kim:
Partial Row Activation for Low-Power DRAM System. HPCA 2017: 217-228 - 2016
- [j23]Seokin Hong, Soontae Kim:
Designing a Resilient L1 Cache Architecture to Process Variation-Induced Access-Time Failures. IEEE Trans. Computers 65(10): 2999-3012 (2016) - [j22]Yebin Lee, Soontae Kim:
RAMS: DRAM Rank-Aware Memory Scheduling for Energy Saving. IEEE Trans. Computers 65(10): 3210-3216 (2016) - [j21]Hamed Farbeh, Hyeonggyu Kim, Seyed Ghassem Miremadi, Soontae Kim:
Floating-ECC: Dynamic Repositioning of Error Correcting Code Bits for Extending the Lifetime of STT-RAM Caches. IEEE Trans. Computers 65(12): 3661-3675 (2016) - [j20]Jongmin Lee, Soontae Kim:
Write Buffer-Oriented Energy Reduction in the L1 Data Cache for Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 871-883 (2016) - [j19]Yebin Lee, Soontae Kim:
CLAP: Clustered Look-Ahead Prefetching for Energy-Efficient DRAM System. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1770-1782 (2016) - [j18]Jeongkyu Hong, Soontae Kim:
Flexible ECC Management for Low-Cost Transient Error Protection of Last-Level Caches. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2152-2164 (2016) - [c33]Minho Ju, Hyeonggyu Kim, Soontae Kim:
Network delay-aware energy management for mobile systems. DATE 2016: 157-162 - [c32]Minho Ju, Hyeonggyu Kim, Soontae Kim:
MofySim: A mobile full-system simulation framework for energy consumption and performance analysis. ISPASS 2016: 245-254 - 2015
- [j17]Tayyeb Mahmood, Seokin Hong, Soontae Kim:
Ensuring Cache Reliability and Energy Scaling at Near-Threshold Voltage With Macho. IEEE Trans. Computers 64(6): 1694-1706 (2015) - [j16]Jongmin Lee, Soontae Kim:
Filter Data Cache: An Energy-Efficient Small L0 Data Cache Architecture Driven byMiss Cost Reduction. IEEE Trans. Computers 64(7): 1927-1939 (2015) - [j15]Seokin Hong, Soontae Kim:
A Low-Cost Mechanism Exploiting Narrow-Width Values for Tolerating Hard Faults in ALU. IEEE Trans. Computers 64(9): 2433-2446 (2015) - [j14]Mohammad Abdur Rouf, Soontae Kim:
Low-Cost Control Flow Protection via Available Redundancies in the Microprocessor Pipeline. IEEE Trans. Very Large Scale Integr. Syst. 23(1): 131-141 (2015) - [j13]Jeongkyu Hong, Jesung Kim, Soontae Kim:
Exploiting Same Tag Bits to Improve the Reliability of the Cache Memories. IEEE Trans. Very Large Scale Integr. Syst. 23(2): 254-265 (2015) - [c31]Minho Ju, Hyeonggyu Kim, Mincheol Kang, Soontae Kim:
Efficient memory reclaiming for mitigating sluggish response in mobile devices. ICCE-Berlin 2015: 232-236 - 2014
- [c30]Seokin Hong, Jongmin Lee, Soontae Kim:
Ternary cache: Three-valued MLC STT-RAM caches. ICCD 2014: 83-89 - 2013
- [j12]Tayyeb Mahmood, Soontae Kim:
Fault buffers - Enabling near-true voltage scaling in variation-sensitive L1 caches. Des. Autom. Embed. Syst. 17(2): 411-438 (2013) - [c29]Seokin Hong, Soontae Kim:
AVICA: an access-time variation insensitive L1 cache architecture. DATE 2013: 65-70 - [c28]Yebin Lee, Soontae Kim, Seokin Hong, Jongmin Lee:
Skinflint DRAM system: Minimizing DRAM chip writes for low power. HPCA 2013: 25-34 - [c27]Tayyeb Mahmood, Soontae Kim, Seokin Hong:
Macho: A failure model-oriented adaptive cache architecture to enable near-threshold voltage scaling. HPCA 2013: 532-541 - [c26]Myoungjun Lee, Soontae Kim:
Performance-controllable shared cache architecture for multi-core soft real-time systems. ICCD 2013: 519-522 - 2012
- [j11]Kwangcheol Shin, Kyungjun Kim, Soontae Kim:
Traffic management strategy for delay-tolerant networks. J. Netw. Comput. Appl. 35(6): 1762-1770 (2012) - [j10]Divyan Munirathnam Konidala, Made Harta Dwijaksara, Kwangjo Kim, Dongman Lee, Byoungcheon Lee, Daeyoung Kim, Soontae Kim:
Resuscitating privacy-preserving mobile payment with customer in complete control. Pers. Ubiquitous Comput. 16(6): 643-654 (2012) - [j9]Kwangcheol Shin, Soontae Kim:
Predictive routing for mobile sinks in wireless sensor networks: a milestone-based approach. J. Supercomput. 62(3): 1519-1536 (2012) - [c25]Mohammad Abdur Rouf, Soontae Kim:
Low-cost control flow error protection by exploiting available redundancies in the pipeline. ASP-DAC 2012: 175-180 - [c24]Jeongkyu Hong, Soontae Kim:
ECC string: Flexible ECC management for low-cost error protection of L2 caches. ICCD 2012: 512-513 - [c23]Jongmin Lee, Soontae Kim:
Adopting TLB index-based tagging to data caches for tag energy reduction. ISLPED 2012: 231-236 - [c22]Sukki Kim, Soontae Kim, Yebin Lee:
DRAM power-aware rank scheduling. ISLPED 2012: 397-402 - 2011
- [j8]Kwangcheol Shin, Soontae Kim:
Enhanced buffer management policy that utilises message properties for delay-tolerant networks. IET Commun. 5(6): 753-759 (2011) - [c21]Kwangcheol Shin, Kyungjun Kim, Soontae Kim:
ADSR: Angle-Based Multi-hop Routing Strategy for Mobile Wireless Sensor Networks. APSCC 2011: 373-376 - [c20]Tayyeb Mahmood, Soontae Kim:
Realizing near-true voltage scaling in variation-sensitive l1 caches via fault buffers. CASES 2011: 85-94 - [c19]Taeju Park, Soontae Kim:
Dynamic scheduling algorithm and its schedulability analysis for certifiable dual-criticality systems. EMSOFT 2011: 253-262 - [c18]Yebin Lee, Soontae Kim:
DRAM energy reduction by prefetching-based memory traffic clustering. ACM Great Lakes Symposium on VLSI 2011: 103-108 - [c17]Jongmin Lee, Seokin Hong, Soontae Kim:
TLB index-based tagging for cache energy reduction. ISLPED 2011: 85-90 - [c16]Soontae Kim, Jongmin Lee, Jesung Kim, Seokin Hong:
Residue cache: a low-energy low-area L2 cache architecture via compression and partial hits. MICRO 2011: 420-429 - 2010
- [c15]Jesung Kim, Soontae Kim, Yebin Lee:
SimTag: Exploiting tag bits similarity to improve the reliability of the data caches. DATE 2010: 941-944 - [c14]Soontae Kim, Jongmin Lee:
Write buffer-oriented energy reduction in the L1 data cache of two-level caches for the embedded system. ACM Great Lakes Symposium on VLSI 2010: 257-262 - [c13]Seokin Hong, Soontae Kim:
Lizard: Energy-efficient hard fault detection, diagnosis and isolation in the ALU. ICCD 2010: 342-349 - [c12]Tayyeb Mahmood, Soontae Kim:
Fine-Grained Fault Tolerance for Process Variation-Aware Caches. ISVLSI 2010: 46-51 - [c11]Mohammad Abdur Rouf, Soontae Kim:
Modeling and Evaluation of Control Flow Vulnerability in the Embedded System. MASCOTS 2010: 430-433
2000 – 2009
- 2009
- [j7]Soontae Kim:
Reducing Area Overhead for Error-Protecting Large L2/L3 Caches. IEEE Trans. Computers 58(3): 300-310 (2009) - [j6]Koustav Bhattacharya, Nagarajan Ranganathan, Soontae Kim:
A Framework for Correction of Multi-Bit Soft Errors in L2 Caches Based on Redundancy. IEEE Trans. Very Large Scale Integr. Syst. 17(2): 194-206 (2009) - [c10]Jongmin Lee, Soontae Kim:
An energy-delay efficient 2-level data cache architecture for embedded system. ISLPED 2009: 343-346 - [c9]Seokin Hong, Soontae Kim:
TEPS: Transient Error Protection Utilizing Sub-word Parallelism. ISVLSI 2009: 286-291 - 2007
- [j5]Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin:
Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocess. Microsystems 31(5): 293-301 (2007) - [c8]Koustav Bhattacharya, Soontae Kim, Nagarajan Ranganathan:
Improving the reliability of on-chip L2 cache using redundancy. ICCD 2007: 224-229 - [c7]Soontae Kim:
Reducing ALU and Register File Energy by Dynamic Zero Detection. IPCCC 2007: 365-371 - 2006
- [c6]Soontae Kim:
Area-efficient error protection for caches. DATE 2006: 1282-1287 - 2004
- [j4]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Optimizing Leakage Energy Consumption in Cache Bitlines. Des. Autom. Embed. Syst. 9(1): 5-18 (2004) - [j3]Amisha Parikh, Soontae Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin:
Instruction Scheduling for Low Power. J. VLSI Signal Process. 37(1): 129-149 (2004) - [j2]J. Juran, Ali R. Hurson, Narayanan Vijaykrishnan, Soontae Kim:
Data Organization and Retrieval on Parallel Air Channels: Performance and Energy Issues. Wirel. Networks 10(2): 183-195 (2004) - [c5]Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin:
Scheduling Reusable Instructions for Power Reduction. DATE 2004: 148-155 - 2003
- [j1]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin:
Partitioned instruction cache architecture for energy efficiency. ACM Trans. Embed. Comput. Syst. 2(2): 163-185 (2003) - [c4]Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Richard R. Brooks, Soontae Kim, Wei Zhang:
Masking the Energy Behavior of DES Encryption. DATE 2003: 10084-10089 - [c3]Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John:
On load latency in low-power caches. ISLPED 2003: 258-261 - 2001
- [c2]Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali:
Power-aware partitioned cache architectures. ISLPED 2001: 64-67 - [c1]Narayanan Vijaykrishnan, Mahmut T. Kandemir, Soontae Kim, Samarjeet Singh Tomar, Anand Sivasubramaniam, Mary Jane Irwin:
Energy Behavior of Java Applications from the Memory Perspective. Java Virtual Machine Research and Technology Symposium 2001: 207-220
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-06-25 21:00 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
