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BibTeX record conf/esscirc/ChenDPZMZY0WMS17
@inproceedings{DBLP:conf/esscirc/ChenDPZMZY0WMS17, author = {Chixiao Chen and Hongwei Ding and Huwan Peng and Haozhe Zhu and Rui Ma and Peiyong Zhang and Xiaolang Yan and Yu Wang and Mingyu Wang and Hao Min and C.{-}J. Richard Shi}, title = {{OCEAN:} An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators}, booktitle = {43rd {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2017, Leuven, Belgium, September 11-14, 2017}, pages = {259--262}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ESSCIRC.2017.8094575}, doi = {10.1109/ESSCIRC.2017.8094575}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/esscirc/ChenDPZMZY0WMS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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