BibTeX record conf/glvlsi/EdahiroL96

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@inproceedings{DBLP:conf/glvlsi/EdahiroL96,
  author       = {Masato Edahiro and
                  Richard J. Lipton},
  title        = {Clock Buffer Placement Algorithm for Wire-Delay-Dominated Timing Model},
  booktitle    = {6th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '96), March 22-23,
                  1996, Ames, IA, {USA}},
  pages        = {143--147},
  publisher    = {{IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/GLSV.1996.497610},
  doi          = {10.1109/GLSV.1996.497610},
  timestamp    = {Fri, 24 Mar 2023 00:04:01 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/EdahiroL96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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