BibTeX record conf/glvlsi/ImaniPR16

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@inproceedings{DBLP:conf/glvlsi/ImaniPR16,
  author       = {Mohsen Imani and
                  Shruti Patil and
                  Tajana Simunic Rosing},
  editor       = {Ayse K. Coskun and
                  Martin Margala and
                  Laleh Behjat and
                  Jie Han},
  title        = {{DCC:} Double Capacity Cache Architecture for Narrow-Width Values},
  booktitle    = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
                  {GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
  pages        = {113--116},
  publisher    = {{ACM}},
  year         = {2016},
  url          = {https://doi.org/10.1145/2902961.2902990},
  doi          = {10.1145/2902961.2902990},
  timestamp    = {Wed, 10 Mar 2021 14:55:38 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/ImaniPR16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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