BibTeX record conf/glvlsi/JeongNIA09

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@inproceedings{DBLP:conf/glvlsi/JeongNIA09,
  author       = {MyeongGyu Jeong and
                  Toru Nakura and
                  Makoto Ikeda and
                  Kunihiro Asada},
  editor       = {Fabrizio Lombardi and
                  Sanjukta Bhanja and
                  Yehia Massoud and
                  R. Iris Bahar},
  title        = {Moebius circuit: dual-rail dynamic logic for logic gate level pipeline
                  with error gate search feature},
  booktitle    = {Proceedings of the 19th {ACM} Great Lakes Symposium on {VLSI} 2009,
                  Boston Area, MA, USA, May 10-12 2009},
  pages        = {177--180},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1531542.1531587},
  doi          = {10.1145/1531542.1531587},
  timestamp    = {Sun, 02 Jun 2019 21:15:14 +0200},
  biburl       = {https://dblp.org/rec/conf/glvlsi/JeongNIA09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}